diff options
author | Nanley Chery <[email protected]> | 2017-01-31 16:12:50 -0800 |
---|---|---|
committer | Nanley Chery <[email protected]> | 2017-03-02 13:17:55 -0800 |
commit | 608d17b80e617b0052b148083d169d97e8f81ab3 (patch) | |
tree | 24c85c3697dfd99664718a419343c1a04d3b6b09 /src | |
parent | 6326f0f4be60a85061ad294d2122caa0be2ef3ce (diff) |
anv: Store the user's VkAttachmentReference
We will be using the image layout. Store the full struct directly from
the user.
Signed-off-by: Nanley Chery <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/intel/vulkan/anv_blorp.c | 24 | ||||
-rw-r--r-- | src/intel/vulkan/anv_cmd_buffer.c | 4 | ||||
-rw-r--r-- | src/intel/vulkan/anv_pass.c | 21 | ||||
-rw-r--r-- | src/intel/vulkan/anv_pipeline.c | 6 | ||||
-rw-r--r-- | src/intel/vulkan/anv_private.h | 14 | ||||
-rw-r--r-- | src/intel/vulkan/gen7_cmd_buffer.c | 4 | ||||
-rw-r--r-- | src/intel/vulkan/genX_cmd_buffer.c | 18 | ||||
-rw-r--r-- | src/intel/vulkan/genX_pipeline.c | 8 |
8 files changed, 47 insertions, 52 deletions
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c index c109947c106..7472efce6ab 100644 --- a/src/intel/vulkan/anv_blorp.c +++ b/src/intel/vulkan/anv_blorp.c @@ -950,7 +950,7 @@ clear_color_attachment(struct anv_cmd_buffer *cmd_buffer, { const struct anv_subpass *subpass = cmd_buffer->state.subpass; const uint32_t color_att = attachment->colorAttachment; - const uint32_t att_idx = subpass->color_attachments[color_att]; + const uint32_t att_idx = subpass->color_attachments[color_att].attachment; if (att_idx == VK_ATTACHMENT_UNUSED) return; @@ -987,7 +987,7 @@ clear_depth_stencil_attachment(struct anv_cmd_buffer *cmd_buffer, { static const union isl_color_value color_value = { .u32 = { 0, } }; const struct anv_subpass *subpass = cmd_buffer->state.subpass; - const uint32_t att_idx = subpass->depth_stencil_attachment; + const uint32_t att_idx = subpass->depth_stencil_attachment.attachment; if (att_idx == VK_ATTACHMENT_UNUSED) return; @@ -1119,7 +1119,7 @@ anv_cmd_buffer_flush_attachments(struct anv_cmd_buffer *cmd_buffer, struct anv_render_pass *pass = cmd_buffer->state.pass; for (uint32_t i = 0; i < subpass->color_count; ++i) { - uint32_t att = subpass->color_attachments[i]; + uint32_t att = subpass->color_attachments[i].attachment; assert(att < pass->attachment_count); if (attachment_needs_flush(cmd_buffer, &pass->attachments[att], stage)) { cmd_buffer->state.pending_pipe_bits |= @@ -1128,8 +1128,8 @@ anv_cmd_buffer_flush_attachments(struct anv_cmd_buffer *cmd_buffer, } } - if (subpass->depth_stencil_attachment != VK_ATTACHMENT_UNUSED) { - uint32_t att = subpass->depth_stencil_attachment; + if (subpass->depth_stencil_attachment.attachment != VK_ATTACHMENT_UNUSED) { + uint32_t att = subpass->depth_stencil_attachment.attachment; assert(att < pass->attachment_count); if (attachment_needs_flush(cmd_buffer, &pass->attachments[att], stage)) { cmd_buffer->state.pending_pipe_bits |= @@ -1143,10 +1143,10 @@ static bool subpass_needs_clear(const struct anv_cmd_buffer *cmd_buffer) { const struct anv_cmd_state *cmd_state = &cmd_buffer->state; - uint32_t ds = cmd_state->subpass->depth_stencil_attachment; + uint32_t ds = cmd_state->subpass->depth_stencil_attachment.attachment; for (uint32_t i = 0; i < cmd_state->subpass->color_count; ++i) { - uint32_t a = cmd_state->subpass->color_attachments[i]; + uint32_t a = cmd_state->subpass->color_attachments[i].attachment; if (cmd_state->attachments[a].pending_clear_aspects) { return true; } @@ -1185,7 +1185,7 @@ anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer) struct anv_framebuffer *fb = cmd_buffer->state.framebuffer; for (uint32_t i = 0; i < cmd_state->subpass->color_count; ++i) { - const uint32_t a = cmd_state->subpass->color_attachments[i]; + const uint32_t a = cmd_state->subpass->color_attachments[i].attachment; struct anv_attachment_state *att_state = &cmd_state->attachments[a]; if (!att_state->pending_clear_aspects) @@ -1231,7 +1231,7 @@ anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer) att_state->pending_clear_aspects = 0; } - const uint32_t ds = cmd_state->subpass->depth_stencil_attachment; + const uint32_t ds = cmd_state->subpass->depth_stencil_attachment.attachment; if (ds != VK_ATTACHMENT_UNUSED && cmd_state->attachments[ds].pending_clear_aspects) { @@ -1536,15 +1536,15 @@ anv_cmd_buffer_resolve_subpass(struct anv_cmd_buffer *cmd_buffer) for (uint32_t i = 0; i < subpass->color_count; ++i) { ccs_resolve_attachment(cmd_buffer, &batch, - subpass->color_attachments[i]); + subpass->color_attachments[i].attachment); } anv_cmd_buffer_flush_attachments(cmd_buffer, SUBPASS_STAGE_DRAW); if (subpass->has_resolve) { for (uint32_t i = 0; i < subpass->color_count; ++i) { - uint32_t src_att = subpass->color_attachments[i]; - uint32_t dst_att = subpass->resolve_attachments[i]; + uint32_t src_att = subpass->color_attachments[i].attachment; + uint32_t dst_att = subpass->resolve_attachments[i].attachment; if (dst_att == VK_ATTACHMENT_UNUSED) continue; diff --git a/src/intel/vulkan/anv_cmd_buffer.c b/src/intel/vulkan/anv_cmd_buffer.c index a765bfeaff3..ef369c10f5b 100644 --- a/src/intel/vulkan/anv_cmd_buffer.c +++ b/src/intel/vulkan/anv_cmd_buffer.c @@ -808,11 +808,11 @@ anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer) const struct anv_subpass *subpass = cmd_buffer->state.subpass; const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer; - if (subpass->depth_stencil_attachment == VK_ATTACHMENT_UNUSED) + if (subpass->depth_stencil_attachment.attachment == VK_ATTACHMENT_UNUSED) return NULL; const struct anv_image_view *iview = - fb->attachments[subpass->depth_stencil_attachment]; + fb->attachments[subpass->depth_stencil_attachment.attachment]; assert(iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT)); diff --git a/src/intel/vulkan/anv_pass.c b/src/intel/vulkan/anv_pass.c index a8b24703bcf..399ccb3970f 100644 --- a/src/intel/vulkan/anv_pass.c +++ b/src/intel/vulkan/anv_pass.c @@ -80,7 +80,8 @@ VkResult anv_CreateRenderPass( usages += pass->subpass_count; } - uint32_t subpass_attachment_count = 0, *p; + uint32_t subpass_attachment_count = 0; + VkAttachmentReference *p; for (uint32_t i = 0; i < pCreateInfo->subpassCount; i++) { const VkSubpassDescription *desc = &pCreateInfo->pSubpasses[i]; @@ -93,7 +94,7 @@ VkResult anv_CreateRenderPass( pass->subpass_attachments = vk_alloc2(&device->alloc, pAllocator, - subpass_attachment_count * sizeof(uint32_t), 8, + subpass_attachment_count * sizeof(VkAttachmentReference), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (pass->subpass_attachments == NULL) { vk_free2(&device->alloc, pAllocator, pass->subpass_usages); @@ -115,7 +116,7 @@ VkResult anv_CreateRenderPass( for (uint32_t j = 0; j < desc->inputAttachmentCount; j++) { uint32_t a = desc->pInputAttachments[j].attachment; - subpass->input_attachments[j] = a; + subpass->input_attachments[j] = desc->pInputAttachments[j]; if (a != VK_ATTACHMENT_UNUSED) { pass->attachments[a].usage |= VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT; pass->attachments[a].subpass_usage[i] |= ANV_SUBPASS_USAGE_INPUT; @@ -134,7 +135,7 @@ VkResult anv_CreateRenderPass( for (uint32_t j = 0; j < desc->colorAttachmentCount; j++) { uint32_t a = desc->pColorAttachments[j].attachment; - subpass->color_attachments[j] = a; + subpass->color_attachments[j] = desc->pColorAttachments[j]; if (a != VK_ATTACHMENT_UNUSED) { pass->attachments[a].usage |= VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT; pass->attachments[a].subpass_usage[i] |= ANV_SUBPASS_USAGE_DRAW; @@ -150,7 +151,7 @@ VkResult anv_CreateRenderPass( for (uint32_t j = 0; j < desc->colorAttachmentCount; j++) { uint32_t a = desc->pResolveAttachments[j].attachment; - subpass->resolve_attachments[j] = a; + subpass->resolve_attachments[j] = desc->pResolveAttachments[j]; if (a != VK_ATTACHMENT_UNUSED) { subpass->has_resolve = true; uint32_t color_att = desc->pColorAttachments[j].attachment; @@ -169,9 +170,7 @@ VkResult anv_CreateRenderPass( if (desc->pDepthStencilAttachment) { uint32_t a = desc->pDepthStencilAttachment->attachment; - subpass->depth_stencil_attachment = a; - subpass->depth_stencil_layout = - desc->pDepthStencilAttachment->layout; + subpass->depth_stencil_attachment = *desc->pDepthStencilAttachment; if (a != VK_ATTACHMENT_UNUSED) { pass->attachments[a].usage |= VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT; @@ -179,8 +178,8 @@ VkResult anv_CreateRenderPass( pass->attachments[a].last_subpass_idx = i; } } else { - subpass->depth_stencil_attachment = VK_ATTACHMENT_UNUSED; - subpass->depth_stencil_layout = VK_IMAGE_LAYOUT_UNDEFINED; + subpass->depth_stencil_attachment.attachment = VK_ATTACHMENT_UNUSED; + subpass->depth_stencil_attachment.layout = VK_IMAGE_LAYOUT_UNDEFINED; } } @@ -216,7 +215,7 @@ void anv_GetRenderAreaGranularity( * for all sample counts. */ for (unsigned i = 0; i < pass->subpass_count; ++i) { - if (pass->subpasses[i].depth_stencil_attachment != + if (pass->subpasses[i].depth_stencil_attachment.attachment != VK_ATTACHMENT_UNUSED) { *pGranularity = (VkExtent2D) { .width = 8, .height = 4 }; return; diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index 708b05a9535..91a3becad50 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -1056,7 +1056,7 @@ copy_non_dynamic_state(struct anv_pipeline *pipeline, */ bool uses_color_att = false; for (unsigned i = 0; i < subpass->color_count; ++i) { - if (subpass->color_attachments[i] != VK_ATTACHMENT_UNUSED) { + if (subpass->color_attachments[i].attachment != VK_ATTACHMENT_UNUSED) { uses_color_att = true; break; } @@ -1084,7 +1084,7 @@ copy_non_dynamic_state(struct anv_pipeline *pipeline, * against does not use a depth/stencil attachment. */ if (!pCreateInfo->pRasterizationState->rasterizerDiscardEnable && - subpass->depth_stencil_attachment != VK_ATTACHMENT_UNUSED) { + subpass->depth_stencil_attachment.attachment != VK_ATTACHMENT_UNUSED) { assert(pCreateInfo->pDepthStencilState); if (states & (1 << VK_DYNAMIC_STATE_DEPTH_BOUNDS)) { @@ -1144,7 +1144,7 @@ anv_pipeline_validate_create_info(const VkGraphicsPipelineCreateInfo *info) assert(info->pViewportState); assert(info->pMultisampleState); - if (subpass && subpass->depth_stencil_attachment != VK_ATTACHMENT_UNUSED) + if (subpass && subpass->depth_stencil_attachment.attachment != VK_ATTACHMENT_UNUSED) assert(info->pDepthStencilState); if (subpass && subpass->color_count > 0) diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index 3adf79686bc..9319564d0cc 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -1922,16 +1922,12 @@ struct anv_framebuffer { struct anv_subpass { uint32_t input_count; - uint32_t * input_attachments; + VkAttachmentReference * input_attachments; uint32_t color_count; - uint32_t * color_attachments; - uint32_t * resolve_attachments; + VkAttachmentReference * color_attachments; + VkAttachmentReference * resolve_attachments; - /* TODO: Consider storing the depth/stencil VkAttachmentReference - * instead of its two structure members (below) individually. - */ - uint32_t depth_stencil_attachment; - VkImageLayout depth_stencil_layout; + VkAttachmentReference depth_stencil_attachment; /** Subpass has a depth/stencil self-dependency */ bool has_ds_self_dep; @@ -1970,7 +1966,7 @@ struct anv_render_pass_attachment { struct anv_render_pass { uint32_t attachment_count; uint32_t subpass_count; - uint32_t * subpass_attachments; + VkAttachmentReference * subpass_attachments; enum anv_subpass_usage * subpass_usages; struct anv_render_pass_attachment * attachments; struct anv_subpass subpasses[0]; diff --git a/src/intel/vulkan/gen7_cmd_buffer.c b/src/intel/vulkan/gen7_cmd_buffer.c index 4ea3158a0f5..01abadb49e1 100644 --- a/src/intel/vulkan/gen7_cmd_buffer.c +++ b/src/intel/vulkan/gen7_cmd_buffer.c @@ -127,11 +127,11 @@ get_depth_format(struct anv_cmd_buffer *cmd_buffer) const struct anv_render_pass *pass = cmd_buffer->state.pass; const struct anv_subpass *subpass = cmd_buffer->state.subpass; - if (subpass->depth_stencil_attachment >= pass->attachment_count) + if (subpass->depth_stencil_attachment.attachment >= pass->attachment_count) return D16_UNORM; struct anv_render_pass_attachment *att = - &pass->attachments[subpass->depth_stencil_attachment]; + &pass->attachments[subpass->depth_stencil_attachment.attachment]; switch (att->format) { case VK_FORMAT_D16_UNORM: diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index 851cbc59f18..7f1f4a75587 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -1143,7 +1143,7 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer, assert(stage == MESA_SHADER_FRAGMENT); assert(binding->binding == 0); if (binding->index < subpass->color_count) { - const unsigned att = subpass->color_attachments[binding->index]; + const unsigned att = subpass->color_attachments[binding->index].attachment; surface_state = cmd_buffer->state.attachments[att].color_rt_state; } else { surface_state = cmd_buffer->state.null_surface_state; @@ -1191,7 +1191,7 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer, */ assert(binding->input_attachment_index < subpass->input_count); const unsigned subpass_att = binding->input_attachment_index; - const unsigned att = subpass->input_attachments[subpass_att]; + const unsigned att = subpass->input_attachments[subpass_att].attachment; surface_state = cmd_buffer->state.attachments[att].input_att_state; } break; @@ -2202,7 +2202,7 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer) anv_cmd_buffer_get_depth_stencil_view(cmd_buffer); const struct anv_image *image = iview ? iview->image : NULL; const bool has_depth = image && (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT); - const uint32_t ds = cmd_buffer->state.subpass->depth_stencil_attachment; + const uint32_t ds = cmd_buffer->state.subpass->depth_stencil_attachment.attachment; const bool has_hiz = image != NULL && cmd_buffer->state.attachments[ds].aux_usage == ISL_AUX_USAGE_HIZ; const bool has_stencil = @@ -2364,16 +2364,16 @@ genX(cmd_buffer_set_subpass)(struct anv_cmd_buffer *cmd_buffer, anv_cmd_buffer_get_depth_stencil_view(cmd_buffer); if (iview && iview->image->aux_usage == ISL_AUX_USAGE_HIZ) { - const uint32_t ds = subpass->depth_stencil_attachment; + const uint32_t ds = subpass->depth_stencil_attachment.attachment; transition_depth_buffer(cmd_buffer, iview->image, cmd_buffer->state.attachments[ds].current_layout, - cmd_buffer->state.subpass->depth_stencil_layout); + cmd_buffer->state.subpass->depth_stencil_attachment.layout); cmd_buffer->state.attachments[ds].current_layout = - cmd_buffer->state.subpass->depth_stencil_layout; + cmd_buffer->state.subpass->depth_stencil_attachment.layout; cmd_buffer->state.attachments[ds].aux_usage = anv_layout_to_aux_usage(&cmd_buffer->device->info, iview->image, iview->aspect_mask, - cmd_buffer->state.subpass->depth_stencil_layout); + cmd_buffer->state.subpass->depth_stencil_attachment.layout); } cmd_buffer_emit_depth_stencil(cmd_buffer); @@ -2412,7 +2412,7 @@ void genX(CmdNextSubpass)( anv_cmd_buffer_get_depth_stencil_view(cmd_buffer); if (iview && iview->image->aux_usage == ISL_AUX_USAGE_HIZ) { - const uint32_t ds = cmd_buffer->state.subpass->depth_stencil_attachment; + const uint32_t ds = cmd_buffer->state.subpass->depth_stencil_attachment.attachment; if (cmd_buffer->state.subpass - cmd_buffer->state.pass->subpasses == cmd_buffer->state.pass->attachments[ds].last_subpass_idx) { @@ -2435,7 +2435,7 @@ void genX(CmdEndRenderPass)( anv_cmd_buffer_get_depth_stencil_view(cmd_buffer); if (iview && iview->image->aux_usage == ISL_AUX_USAGE_HIZ) { - const uint32_t ds = cmd_buffer->state.subpass->depth_stencil_attachment; + const uint32_t ds = cmd_buffer->state.subpass->depth_stencil_attachment.attachment; if (cmd_buffer->state.subpass - cmd_buffer->state.pass->subpasses == cmd_buffer->state.pass->attachments[ds].last_subpass_idx) { diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c index 2a7e5527462..a6ec3b6f104 100644 --- a/src/intel/vulkan/genX_pipeline.c +++ b/src/intel/vulkan/genX_pipeline.c @@ -489,9 +489,9 @@ emit_rs_state(struct anv_pipeline *pipeline, /* Gen7 requires that we provide the depth format in 3DSTATE_SF so that it * can get the depth offsets correct. */ - if (subpass->depth_stencil_attachment < pass->attachment_count) { + if (subpass->depth_stencil_attachment.attachment < pass->attachment_count) { VkFormat vk_format = - pass->attachments[subpass->depth_stencil_attachment].format; + pass->attachments[subpass->depth_stencil_attachment.attachment].format; assert(vk_format_is_depth_or_stencil(vk_format)); if (vk_format_aspects(vk_format) & VK_IMAGE_ASPECT_DEPTH_BIT) { enum isl_format isl_format = @@ -807,9 +807,9 @@ emit_ds_state(struct anv_pipeline *pipeline, } VkImageAspectFlags ds_aspects = 0; - if (subpass->depth_stencil_attachment != VK_ATTACHMENT_UNUSED) { + if (subpass->depth_stencil_attachment.attachment != VK_ATTACHMENT_UNUSED) { VkFormat depth_stencil_format = - pass->attachments[subpass->depth_stencil_attachment].format; + pass->attachments[subpass->depth_stencil_attachment.attachment].format; ds_aspects = vk_format_aspects(depth_stencil_format); } |