diff options
author | Kristian Høgsberg Kristensen <[email protected]> | 2016-03-04 22:07:02 -0800 |
---|---|---|
committer | Kristian Høgsberg Kristensen <[email protected]> | 2016-03-05 13:54:24 -0800 |
commit | 30bbe28b7efc7e6b6fef78ac3233bb7485679d1e (patch) | |
tree | 6b7b405dcf91dd5d9efd0eb2d4bc70bacfcf779c /src | |
parent | 6139fe9a7790e0946e465f275d3f530552edbcdc (diff) |
anv: Always use point size from the shader
There is no API for setting the point size and the shader is always
required to set it. Section 24.4:
"If the value written to PointSize is less than or equal to zero, or
if no value was written to PointSize, results are undefined."
As such, we can just always program PointWidthSource to Vertex. This
simplifies anv_pipeline a bit and avoids trouble when we enable the
pipeline cache and don't have writes_point_size in the prog_data.
Diffstat (limited to 'src')
-rw-r--r-- | src/intel/vulkan/anv_pipeline.c | 6 | ||||
-rw-r--r-- | src/intel/vulkan/anv_private.h | 1 | ||||
-rw-r--r-- | src/intel/vulkan/gen7_pipeline.c | 2 | ||||
-rw-r--r-- | src/intel/vulkan/gen8_pipeline.c | 2 |
4 files changed, 2 insertions, 9 deletions
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index f3f5ecdf660..183589611a1 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -469,8 +469,6 @@ anv_pipeline_compile_vs(struct anv_pipeline *pipeline, ralloc_steal(mem_ctx, nir); prog_data.inputs_read = nir->info.inputs_read; - if (nir->info.outputs_written & (1ull << VARYING_SLOT_PSIZ)) - pipeline->writes_point_size = true; brw_compute_vue_map(&pipeline->device->info, &prog_data.base.vue_map, @@ -556,9 +554,6 @@ anv_pipeline_compile_gs(struct anv_pipeline *pipeline, if (module->nir == NULL) ralloc_steal(mem_ctx, nir); - if (nir->info.outputs_written & (1ull << VARYING_SLOT_PSIZ)) - pipeline->writes_point_size = true; - brw_compute_vue_map(&pipeline->device->info, &prog_data.base.vue_map, nir->info.outputs_written, @@ -1122,7 +1117,6 @@ anv_pipeline_init(struct anv_pipeline *pipeline, anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_TESSELLATION_STATE_CREATE_INFO"); pipeline->use_repclear = extra && extra->use_repclear; - pipeline->writes_point_size = false; /* When we free the pipeline, we detect stages based on the NULL status * of various prog_data pointers. Make them NULL by default. diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index b112b457b99..8c3318816c6 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -1409,7 +1409,6 @@ struct anv_pipeline { bool use_repclear; - bool writes_point_size; const struct brw_stage_prog_data * prog_data[MESA_SHADER_STAGES]; uint32_t scratch_start[MESA_SHADER_STAGES]; uint32_t total_scratch; diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c index 5f480edf809..37e4639b287 100644 --- a/src/intel/vulkan/gen7_pipeline.c +++ b/src/intel/vulkan/gen7_pipeline.c @@ -65,7 +65,7 @@ gen7_emit_rs_state(struct anv_pipeline *pipeline, /* uint32_t AALineDistanceMode; */ /* uint32_t VertexSubPixelPrecisionSelect; */ - .UsePointWidthState = !pipeline->writes_point_size, + .UsePointWidthState = false, .PointWidth = 1.0, .GlobalDepthOffsetEnableSolid = info->depthBiasEnable, .GlobalDepthOffsetEnableWireframe = info->depthBiasEnable, diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c index 5ce1307f090..8edc1574ac3 100644 --- a/src/intel/vulkan/gen8_pipeline.c +++ b/src/intel/vulkan/gen8_pipeline.c @@ -60,7 +60,7 @@ emit_rs_state(struct anv_pipeline *pipeline, .TriangleStripListProvokingVertexSelect = 0, .LineStripListProvokingVertexSelect = 0, .TriangleFanProvokingVertexSelect = 1, - .PointWidthSource = pipeline->writes_point_size ? Vertex : State, + .PointWidthSource = Vertex, .PointWidth = 1.0, }; |