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authorIago Toral Quiroga <[email protected]>2017-01-02 16:28:55 +0100
committerIago Toral Quiroga <[email protected]>2017-01-04 08:14:21 +0100
commit1daa31d8a877a846393c827813324f0a38cf91b6 (patch)
tree399075e78bfd1a4cd26caa089aad40b590fdd8ec /src
parentf03bac1fc7e34aeefc1a6adb11d733b9fda8d3ac (diff)
i965: make intel_batchbuffer_emit_dword() take a batchbuffer as argument
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/intel_batchbuffer.c6
-rw-r--r--src/mesa/drivers/dri/i965/intel_batchbuffer.h18
2 files changed, 12 insertions, 12 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index 1c7bb2c966c..9a3782000a6 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -119,7 +119,7 @@ intel_batchbuffer_require_space(struct brw_context *brw, GLuint sz,
#ifdef DEBUG
assert(sz < BATCH_SZ - BATCH_RESERVED);
#endif
- if (intel_batchbuffer_space(brw) < sz)
+ if (intel_batchbuffer_space(&brw->batch) < sz)
intel_batchbuffer_flush(brw);
enum brw_gpu_ring prev_ring = brw->batch.ring;
@@ -401,10 +401,10 @@ _intel_batchbuffer_flush(struct brw_context *brw,
brw_finish_batch(brw);
/* Mark the end of the buffer. */
- intel_batchbuffer_emit_dword(brw, MI_BATCH_BUFFER_END);
+ intel_batchbuffer_emit_dword(&brw->batch, MI_BATCH_BUFFER_END);
if (USED_BATCH(brw->batch) & 1) {
/* Round batchbuffer usage to 2 DWORDs. */
- intel_batchbuffer_emit_dword(brw, MI_NOOP);
+ intel_batchbuffer_emit_dword(&brw->batch, MI_NOOP);
}
intel_upload_finish(brw);
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.h b/src/mesa/drivers/dri/i965/intel_batchbuffer.h
index c4573ec57b8..aca8fa1665b 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.h
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.h
@@ -94,27 +94,27 @@ static inline uint32_t float_as_int(float f)
* work...
*/
static inline unsigned
-intel_batchbuffer_space(struct brw_context *brw)
+intel_batchbuffer_space(struct intel_batchbuffer *batch)
{
- return (brw->batch.state_batch_offset - brw->batch.reserved_space)
- - USED_BATCH(brw->batch) * 4;
+ return (batch->state_batch_offset - batch->reserved_space)
+ - USED_BATCH(*batch) * 4;
}
static inline void
-intel_batchbuffer_emit_dword(struct brw_context *brw, GLuint dword)
+intel_batchbuffer_emit_dword(struct intel_batchbuffer *batch, GLuint dword)
{
#ifdef DEBUG
- assert(intel_batchbuffer_space(brw) >= 4);
+ assert(intel_batchbuffer_space(batch) >= 4);
#endif
- *brw->batch.map_next++ = dword;
- assert(brw->batch.ring != UNKNOWN_RING);
+ *batch->map_next++ = dword;
+ assert(batch->ring != UNKNOWN_RING);
}
static inline void
-intel_batchbuffer_emit_float(struct brw_context *brw, float f)
+intel_batchbuffer_emit_float(struct intel_batchbuffer *batch, float f)
{
- intel_batchbuffer_emit_dword(brw, float_as_int(f));
+ intel_batchbuffer_emit_dword(batch, float_as_int(f));
}
static inline void