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authorDave Airlie <[email protected]>2017-02-23 14:24:20 +1000
committerDave Airlie <[email protected]>2017-02-24 10:31:19 +1000
commitfc430c391b4be0e92bc9e297aaa260c674648ac2 (patch)
treebf5ac1cb69af8187bc007828abd80466c49c7ab3 /src
parentdcac48bfee545660dffbf23bd92a0939b19ffd18 (diff)
radv: fix interpolation at wrong place for offset interp
The code was interpolating at the offset from the sample, not the offset from the center. Also fix for persample interpolation modes we should force the pixel center to be at the sample. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/amd/common/ac_nir_to_llvm.c6
-rw-r--r--src/amd/vulkan/radv_cmd_buffer.c1
2 files changed, 4 insertions, 3 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index a74b9065252..ca1416dfbf8 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2884,10 +2884,12 @@ static LLVMValueRef visit_interp(struct nir_to_llvm_context *ctx,
location = INTERP_CENTROID;
break;
case nir_intrinsic_interp_var_at_sample:
- case nir_intrinsic_interp_var_at_offset:
location = INTERP_SAMPLE;
src0 = get_src(ctx, instr->src[0]);
break;
+ case nir_intrinsic_interp_var_at_offset:
+ location = INTERP_CENTER;
+ src0 = get_src(ctx, instr->src[0]);
default:
break;
}
@@ -2910,7 +2912,7 @@ static LLVMValueRef visit_interp(struct nir_to_llvm_context *ctx,
interp_param = lookup_interp_param(ctx, instr->variables[0]->var->data.interpolation, location);
attr_number = LLVMConstInt(ctx->i32, input_index, false);
- if (location == INTERP_SAMPLE) {
+ if (location == INTERP_SAMPLE || location == INTERP_CENTER) {
LLVMValueRef ij_out[2];
LLVMValueRef ddxy_out = emit_ddxy_interp(ctx, interp_param);
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 4aa5df69674..dd6deef17c8 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -685,7 +685,6 @@ radv_emit_fragment_shader(struct radv_cmd_buffer *cmd_buffer,
radeon_set_context_reg(cmd_buffer->cs, R_0286D0_SPI_PS_INPUT_ADDR,
ps->config.spi_ps_input_addr);
- spi_baryc_cntl |= S_0286E0_POS_FLOAT_LOCATION(0);
radeon_set_context_reg(cmd_buffer->cs, R_0286D8_SPI_PS_IN_CONTROL,
S_0286D8_NUM_INTERP(ps->info.fs.num_interp));