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authorEric Anholt <[email protected]>2018-08-01 17:47:13 -0700
committerEric Anholt <[email protected]>2018-08-06 13:03:23 -0700
commitf2c0d310d6efe560de8192ab468ba02d50c9ac1e (patch)
treec67c9f67fb52724755e27babd6fdeb0587779893 /src
parent3f9cb2eb05152f4f0269e97893a16f23261f095b (diff)
v3d: Make sure that QPU instruction-has-a-dest matches VIR.
Found when debugging register spilling -- we would try to spill the dest of a STVPMV, inserting spill code after entering the last segment. In fact, we were likely to to choose to do this, given that the STVPMV "dest" temp was never read from, making it cheap to spill. Cc: "18.2" <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/broadcom/compiler/v3d_compiler.h2
-rw-r--r--src/broadcom/compiler/vir.c10
2 files changed, 11 insertions, 1 deletions
diff --git a/src/broadcom/compiler/v3d_compiler.h b/src/broadcom/compiler/v3d_compiler.h
index 33a9942734d..70edeed2730 100644
--- a/src/broadcom/compiler/v3d_compiler.h
+++ b/src/broadcom/compiler/v3d_compiler.h
@@ -928,7 +928,7 @@ VIR_A_ALU2(OR)
VIR_A_ALU2(XOR)
VIR_A_ALU2(VADD)
VIR_A_ALU2(VSUB)
-VIR_A_ALU2(STVPMV)
+VIR_A_NODST_2(STVPMV)
VIR_A_ALU1(NOT)
VIR_A_ALU1(NEG)
VIR_A_ALU1(FLAPUSH)
diff --git a/src/broadcom/compiler/vir.c b/src/broadcom/compiler/vir.c
index 86379faa5bb..fc0b34d4453 100644
--- a/src/broadcom/compiler/vir.c
+++ b/src/broadcom/compiler/vir.c
@@ -452,6 +452,16 @@ vir_emit_def(struct v3d_compile *c, struct qinst *inst)
{
assert(inst->dst.file == QFILE_NULL);
+ /* If we're emitting an instruction that's a def, it had better be
+ * writing a register.
+ */
+ if (inst->qpu.type == V3D_QPU_INSTR_TYPE_ALU) {
+ assert(inst->qpu.alu.add.op == V3D_QPU_A_NOP ||
+ v3d_qpu_add_op_has_dst(inst->qpu.alu.add.op));
+ assert(inst->qpu.alu.mul.op == V3D_QPU_M_NOP ||
+ v3d_qpu_mul_op_has_dst(inst->qpu.alu.mul.op));
+ }
+
inst->dst = vir_get_temp(c);
if (inst->dst.file == QFILE_TEMP)