diff options
| author | Matt Turner <[email protected]> | 2013-02-11 11:06:13 -0800 |
|---|---|---|
| committer | Matt Turner <[email protected]> | 2013-02-28 13:18:59 -0800 |
| commit | d5c3aa89dc4a8de048920470300bb8a921e72899 (patch) | |
| tree | f19eb8724eb9b1a6d6cd63d59f18e8d3dcfdf6aa /src | |
| parent | b9f6795e34ad0b85b1f4f288dc6d1e5fcee30697 (diff) | |
i965/gen7: Relax restrictions on fake MRFs
Gen6 has write-only MRF registers, and for ease of implementation we
paritition off 16 general purposes registers to act as MRFs on Gen7.
Knowing that our Gen7 MRFs are actually GRFs, we can do things we can't
do with real MRFs:
- read from them;
- return values directly to them from a send instruction; and
- compute directly to them with math instructions.
Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_eu_emit.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index f2dcbeb1f26..cf0a8946efa 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -1708,7 +1708,8 @@ void brw_math( struct brw_compile *p, if (intel->gen >= 6) { struct brw_instruction *insn = next_insn(p, BRW_OPCODE_MATH); - assert(dest.file == BRW_GENERAL_REGISTER_FILE); + assert(dest.file == BRW_GENERAL_REGISTER_FILE || + (intel->gen >= 7 && dest.file == BRW_MESSAGE_REGISTER_FILE)); assert(src.file == BRW_GENERAL_REGISTER_FILE); assert(dest.hstride == BRW_HORIZONTAL_STRIDE_1); @@ -1772,7 +1773,8 @@ void brw_math2(struct brw_compile *p, (void) intel; - assert(dest.file == BRW_GENERAL_REGISTER_FILE); + assert(dest.file == BRW_GENERAL_REGISTER_FILE || + (intel->gen >= 7 && dest.file == BRW_MESSAGE_REGISTER_FILE)); assert(src0.file == BRW_GENERAL_REGISTER_FILE); assert(src1.file == BRW_GENERAL_REGISTER_FILE); |