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authorChristoph Bumiller <[email protected]>2011-10-11 17:58:14 +0200
committerChristoph Bumiller <[email protected]>2011-10-21 23:00:39 +0200
commit9c930639d9f6d713ccfd16b390a41a9f584f348c (patch)
treeb8b1b5c37b2bdab168ecdbab1a16a93749094fd8 /src
parent0e4e0ca6df52ddecd1bb2fe9a427549d1a82b9f9 (diff)
nv50/ir: fix textureGrad with offsets and in non-FPs
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/nv50/codegen/nv50_ir.h1
-rw-r--r--src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp2
-rw-r--r--src/gallium/drivers/nvc0/codegen/nv50_ir_emit_nvc0.cpp8
-rw-r--r--src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp6
4 files changed, 14 insertions, 3 deletions
diff --git a/src/gallium/drivers/nv50/codegen/nv50_ir.h b/src/gallium/drivers/nv50/codegen/nv50_ir.h
index 88306087a98..cf7bd3c0d05 100644
--- a/src/gallium/drivers/nv50/codegen/nv50_ir.h
+++ b/src/gallium/drivers/nv50/codegen/nv50_ir.h
@@ -803,6 +803,7 @@ public:
bool liveOnly; // only execute on live pixels of a quad (optimization)
bool levelZero;
+ bool derivAll;
int8_t useOffsets; // 0, 1, or 4 for textureGatherOffsets
int8_t offset[4][3];
diff --git a/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp b/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp
index ea5f4723f3c..ff6d9666a19 100644
--- a/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp
+++ b/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp
@@ -933,6 +933,8 @@ RegAlloc::InsertConstraintsPass::visit(BasicBlock *bb)
if (!tex->tex.target.isArray() &&
(tex->tex.rIndirectSrc >= 0 || tex->tex.sIndirectSrc >= 0))
++s;
+ if (tex->op == OP_TXD && tex->tex.useOffsets)
+ ++s;
n = tex->srcCount(0xff) - s;
assert(n <= 4);
}
diff --git a/src/gallium/drivers/nvc0/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nvc0/codegen/nv50_ir_emit_nvc0.cpp
index 13f5d2f7c72..ecff42106da 100644
--- a/src/gallium/drivers/nvc0/codegen/nv50_ir_emit_nvc0.cpp
+++ b/src/gallium/drivers/nvc0/codegen/nv50_ir_emit_nvc0.cpp
@@ -968,6 +968,9 @@ CodeEmitterNVC0::emitTEX(const TexInstruction *i)
code[1] |= 0x02000000;
}
+ if (i->tex.derivAll)
+ code[1] |= 1 << 13;
+
defId(i->def[0], 14);
srcId(i->src[0], 20);
@@ -992,6 +995,8 @@ CodeEmitterNVC0::emitTEX(const TexInstruction *i)
code[1] |= 1 << 24;
int src1 = i->tex.target.getArgCount();
+ if (i->op == OP_TXD && i->tex.useOffsets)
+ ++src1;
if (i->src[src1].getFile() == FILE_IMMEDIATE) { // lzero
if (i->op == OP_TXL)
@@ -1052,6 +1057,9 @@ CodeEmitterNVC0::emitQUADOP(const Instruction *i, uint8_t qOp, uint8_t laneMask)
srcId(i->src[0], 20);
srcId(i->srcExists(1) ? i->src[1] : i->src[0], 26);
+ if (i->op == OP_QUADOP && progType != Program::TYPE_FRAGMENT)
+ code[0] |= 1 << 9; // dall
+
emitPredicate(i);
}
diff --git a/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
index 2ef5a87c47d..51537972644 100644
--- a/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
@@ -418,14 +418,14 @@ NVC0LoweringPass::handleTXD(TexInstruction *txd)
int arg = txd->tex.target.getDim() + txd->tex.target.isArray();
handleTEX(txd);
- if (txd->src[arg].exists())
+ while (txd->src[arg].exists())
++arg;
+ txd->tex.derivAll = true;
if (dim > 2 || txd->tex.target.isShadow())
return handleManualTXD(txd);
- // at most s/t/array, x, y, offset
- assert(arg <= 4 && !txd->src[arg].exists());
+ assert(arg <= 4); // at most s/t/array, x, y, offset
for (int c = 0; c < dim; ++c) {
txd->src[arg + c * 2 + 0].set(txd->dPdx[c]);