diff options
| author | Marek Olšák <[email protected]> | 2019-09-24 15:15:00 -0400 |
|---|---|---|
| committer | Dylan Baker <[email protected]> | 2019-10-01 12:29:11 -0700 |
| commit | 8f95245068ec53d63f96f26384af89443f7d962e (patch) | |
| tree | 335ff718fda3cdc7352ab18902b6d4e620bb9cdf /src | |
| parent | a413b55157d0469f1a01f132bac62dbcddff4e14 (diff) | |
radeonsi/gfx10: fix L2 cache rinse programming
Cc: 19.2 <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
(cherry picked from commit 3c0938bece83cd37365c30c35d2d54927f3fe0cd)
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_draw.c | 22 |
1 files changed, 17 insertions, 5 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 118d87e4734..a8372173b8c 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -1130,16 +1130,28 @@ void gfx10_emit_cache_flush(struct si_context *ctx) } if (flags & SI_CONTEXT_INV_VCACHE) gcr_cntl |= S_586_GL1_INV(1) | S_586_GLV_INV(1); + + /* The L2 cache ops are: + * - INV: - invalidate lines that reflect memory (were loaded from memory) + * - don't touch lines that were overwritten (were stored by gfx clients) + * - WB: - don't touch lines that reflect memory + * - write back lines that were overwritten + * - WB | INV: - invalidate lines that reflect memory + * - write back lines that were overwritten + * + * GLM doesn't support WB alone. If WB is set, INV must be set too. + */ if (flags & SI_CONTEXT_INV_L2) { /* Writeback and invalidate everything in L2. */ - gcr_cntl |= S_586_GL2_INV(1) | S_586_GLM_INV(1); + gcr_cntl |= S_586_GL2_INV(1) | S_586_GL2_WB(1) | + S_586_GLM_INV(1) | S_586_GLM_WB(1); ctx->num_L2_invalidates++; } else if (flags & SI_CONTEXT_WB_L2) { - /* Writeback but do not invalidate. */ - gcr_cntl |= S_586_GL2_WB(1); + gcr_cntl |= S_586_GL2_WB(1) | + S_586_GLM_WB(1) | S_586_GLM_INV(1); + } else if (flags & SI_CONTEXT_INV_L2_METADATA) { + gcr_cntl |= S_586_GLM_INV(1) | S_586_GLM_WB(1); } - if (flags & SI_CONTEXT_INV_L2_METADATA) - gcr_cntl |= S_586_GLM_INV(1); if (flags & (SI_CONTEXT_FLUSH_AND_INV_CB | SI_CONTEXT_FLUSH_AND_INV_DB)) { if (flags & SI_CONTEXT_FLUSH_AND_INV_CB) { |