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authorTopi Pohjolainen <[email protected]>2016-03-30 20:41:30 +0300
committerTopi Pohjolainen <[email protected]>2016-04-21 10:20:02 +0300
commit7de72f728b32bcbe70e28adcc8733154794c0343 (patch)
tree07e0712746a15aef7907ae30e868187c4bd8427a /src
parentf7ab4e0cc4e56a7830d407fd708e3ffa408d06d6 (diff)
i965/blorp: Enable blits on gen8
v2 (Ken): Moved switch cases for gen8/9 in texel_fetch() to earlier patch adding gen8/9 sampling support. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.cpp6
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp_blit.cpp6
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c3
3 files changed, 9 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index b567b42e523..8c69f6f3147 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -210,7 +210,7 @@ void
brw_blorp_exec(struct brw_context *brw, const brw_blorp_params *params)
{
struct gl_context *ctx = &brw->ctx;
- uint32_t estimated_max_batch_usage = 1500;
+ const uint32_t estimated_max_batch_usage = brw->gen >= 8 ? 1800 : 1500;
bool check_aperture_failed_once = false;
/* Flush the sampler and render caches. We definitely need to flush the
@@ -236,6 +236,10 @@ retry:
case 7:
gen7_blorp_exec(brw, params);
break;
+ case 8:
+ case 9:
+ gen8_blorp_exec(brw, params);
+ break;
default:
/* BLORP is not supported before Gen6. */
unreachable("not reached");
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index 15247594ed7..91a0553f03f 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -256,8 +256,8 @@ brw_blorp_copytexsubimage(struct brw_context *brw,
src_mt->num_samples > 8 || dst_mt->num_samples > 8)
return false;
- /* BLORP is only supported for Gen6-7. */
- if (brw->gen < 6 || brw->gen > 7)
+ /* BLORP is only supported from Gen6 onwards. */
+ if (brw->gen < 6)
return false;
if (_mesa_get_format_base_format(src_rb->Format) !=
@@ -359,7 +359,7 @@ brw_blorp_framebuffer(struct brw_context *brw,
GLbitfield mask, GLenum filter)
{
/* BLORP is not supported before Gen6. */
- if (brw->gen < 6 || brw->gen >= 8)
+ if (brw->gen < 6)
return mask;
/* There is support only for four and eight samples. */
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index e2d897a0b37..da880b6a1e9 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -2165,8 +2165,7 @@ intel_miptree_updownsample(struct brw_context *brw,
struct intel_mipmap_tree *dst)
{
/* There is support only for four and eight samples. */
- const bool use_blorp = brw->gen < 8 &&
- src->num_samples != 2 && dst->num_samples != 2 &&
+ const bool use_blorp = src->num_samples != 2 && dst->num_samples != 2 &&
src->num_samples <= 8 && dst->num_samples <= 8;
if (use_blorp) {