diff options
| author | Samuel Pitoiset <[email protected]> | 2018-05-21 16:57:54 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2018-05-22 15:53:29 +0200 |
| commit | 75e919c0454dcc759dce69c46717356980f18fd8 (patch) | |
| tree | 0f3adb009a30cafe8a381c06235859d8187fb98f /src | |
| parent | c5536fc8130f96d3990536852c129ae52a0e8351 (diff) | |
radv: fix computation of user sgprs for 32-bit pointers
With 32-bit pointers we only need one user SGPR per desc set.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/amd/vulkan/radv_nir_to_llvm.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 39692e99fd9..b174c027d95 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -694,8 +694,10 @@ static void allocate_user_sgprs(struct radv_shader_context *ctx, uint32_t available_sgprs = ctx->options->chip_class >= GFX9 ? 32 : 16; uint32_t remaining_sgprs = available_sgprs - user_sgpr_count; + uint32_t num_desc_set = + util_bitcount(ctx->shader_info->info.desc_set_used_mask); - if (remaining_sgprs / 2 < util_bitcount(ctx->shader_info->info.desc_set_used_mask)) { + if (remaining_sgprs / (HAVE_32BIT_POINTERS ? 1 : 2) < num_desc_set) { user_sgpr_info->indirect_all_descriptor_sets = true; } } |