diff options
| author | Kenneth Graunke <[email protected]> | 2016-06-06 21:37:34 -0700 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2016-06-12 00:40:15 -0700 |
| commit | 0fb85ac08d61d365e67c8f79d6955e9f89543560 (patch) | |
| tree | 1ecc49e9ce9ff376a6a08f1fd164d95e5d3c5ef9 /src | |
| parent | 1db37ebecf5af55215ace3801f8dbb8b10c5305e (diff) | |
i965: Use the correct number of threads for compute shaders.
We were programming the number of threads per subslice, when we should
have been programming the total number of threads on the GPU as a whole.
Thanks to Curro and Jordan for helping track this down!
On Skylake GT3e:
- Improves performance in Unreal's Elemental Demo by roughly 1.5-1.7x.
- Improves performance in Synmark's Gl43CSDof by roughly 3.7x.
- Improves performance in Synmark's Gl43GSCloth by roughly 1.18x.
On Broadwell GT2:
- Improves performance in Unreal's Elemental Demo by roughly 1.2-1.5x.
- Improves performance in Synmark's Gl43CSDof by roughly 2.0x.
- Improves performance in Synmark's Gl43GSCloth by 1.47035% +/-
0.255654% (n=25).
On Haswell GT3e:
- Improves performance in Unreal's Elemental Demo (in GL 4.3 mode)
by roughly 1.10x.
- Improves performance in Synmark's Gl43CSDof by roughly 1.18x.
- Decreases performance in Synmark's Gl43CSCloth by -1.99484% +/-
0.432771% (n=64).
On Ivybridge GT2:
- Improves performance in Unreal's Elemental Demo (in GL 4.2 mode)
by roughly 1.03x.
- Improves performance in Synmark's G/43CSDof by roughly 1.25x.
- No change in Synmark's Gl43CSCloth (n=28).
Cc: "12.0" <[email protected]>
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Francisco Jerez <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen7_cs_state.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_cs_state.c b/src/mesa/drivers/dri/i965/gen7_cs_state.c index 9d83837812a..ba558a64ac9 100644 --- a/src/mesa/drivers/dri/i965/gen7_cs_state.c +++ b/src/mesa/drivers/dri/i965/gen7_cs_state.c @@ -95,7 +95,9 @@ brw_upload_cs_state(struct brw_context *brw) const uint32_t vfe_num_urb_entries = brw->gen >= 8 ? 2 : 0; const uint32_t vfe_gpgpu_mode = brw->gen == 7 ? SET_FIELD(1, GEN7_MEDIA_VFE_STATE_GPGPU_MODE) : 0; - OUT_BATCH(SET_FIELD(brw->max_cs_threads - 1, MEDIA_VFE_STATE_MAX_THREADS) | + const uint32_t subslices = MAX2(brw->intelScreen->subslice_total, 1); + OUT_BATCH(SET_FIELD(brw->max_cs_threads * subslices - 1, + MEDIA_VFE_STATE_MAX_THREADS) | SET_FIELD(vfe_num_urb_entries, MEDIA_VFE_STATE_URB_ENTRIES) | SET_FIELD(1, MEDIA_VFE_STATE_RESET_GTW_TIMER) | SET_FIELD(1, MEDIA_VFE_STATE_BYPASS_GTW) | |