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authorVinson Lee <[email protected]>2010-03-30 23:46:51 -0700
committerVinson Lee <[email protected]>2010-03-30 23:46:51 -0700
commitf2463eaccf1ef68891783b6b0a85863b950fc7de (patch)
treec40e82c586e2d6f3c2d8211072fd0850a7ccd44a /src
parent5123e33863ac37242eb5e867cd0a38fecbd06b48 (diff)
i965g: Fix assertion that was always true.
surface_format field is a 9-bit field and the value of BRW_SURFACEFORMAT_INVALID exceeds 9 bits.
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/i965/brw_screen_texture.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/gallium/drivers/i965/brw_screen_texture.c b/src/gallium/drivers/i965/brw_screen_texture.c
index f9f17bdabac..40930da882c 100644
--- a/src/gallium/drivers/i965/brw_screen_texture.c
+++ b/src/gallium/drivers/i965/brw_screen_texture.c
@@ -315,6 +315,7 @@ brw_texture_from_handle(struct pipe_screen *screen,
struct brw_winsys_buffer *buffer;
unsigned tiling;
unsigned pitch;
+ GLuint format;
if (templ->target != PIPE_TEXTURE_2D ||
templ->last_level != 0 ||
@@ -362,8 +363,10 @@ brw_texture_from_handle(struct pipe_screen *screen,
tex->ss.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW;
tex->ss.ss0.surface_type = translate_tex_target(tex->base.target);
- tex->ss.ss0.surface_format = translate_tex_format(tex->base.format);
- assert(tex->ss.ss0.surface_format != BRW_SURFACEFORMAT_INVALID);
+
+ format = translate_tex_format(tex->base.format);
+ assert(format != BRW_SURFACEFORMAT_INVALID);
+ tex->ss.ss0.surface_format = format;
/* This is ok for all textures with channel width 8bit or less:
*/