diff options
| author | Eric Anholt <[email protected]> | 2018-08-01 16:56:38 -0700 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2018-08-06 13:03:23 -0700 |
| commit | 3f9cb2eb05152f4f0269e97893a16f23261f095b (patch) | |
| tree | 2bfdefba8077dd383143590f923e352763b52a41 /src | |
| parent | ccbe33af5b086f4b488ac7ca8a8a45ebc9ac189c (diff) | |
v3d: Wait for TMU writes to complete before continuing after a spill.
The simulator complained that we had write responses outstanding at shader
end. It seems that a TMU read does not guarantee that previous TMU writes
by the thread have completed, which surprised me.
Cc: "18.2" <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/broadcom/compiler/vir_register_allocate.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/src/broadcom/compiler/vir_register_allocate.c b/src/broadcom/compiler/vir_register_allocate.c index 598c4085235..bc34f68e59a 100644 --- a/src/broadcom/compiler/vir_register_allocate.c +++ b/src/broadcom/compiler/vir_register_allocate.c @@ -102,7 +102,7 @@ v3d_choose_spill_node(struct v3d_compile *c, struct ra_graph *g, started_last_seg = true; /* Track when we're in between a TMU setup and the - * final LDTMU from that TMU setup. We can't + * final LDTMU or TMUWT from that TMU setup. We can't * spill/fill any temps during that time, because that * involves inserting a new TMU setup/LDTMU sequence. */ @@ -110,6 +110,10 @@ v3d_choose_spill_node(struct v3d_compile *c, struct ra_graph *g, is_last_ldtmu(inst, block)) in_tmu_operation = false; + if (inst->qpu.type == V3D_QPU_INSTR_TYPE_ALU && + inst->qpu.alu.add.op == V3D_QPU_A_TMUWT) + in_tmu_operation = false; + if (v3d_qpu_writes_tmu(&inst->qpu)) in_tmu_operation = true; } @@ -206,6 +210,7 @@ v3d_spill_reg(struct v3d_compile *c, int spill_temp) inst->dst); v3d_emit_spill_tmua(c, spill_offset); vir_emit_thrsw(c); + vir_TMUWT(c); c->spills++; } |