diff options
| author | Rob Clark <[email protected]> | 2014-01-14 19:06:46 -0500 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2014-02-01 11:59:25 -0500 |
| commit | 1fe9df8f29106013f5b6e4407b4877f6bf3b493d (patch) | |
| tree | 76c58c86411110300b32c011774b04ed25b72c15 /src | |
| parent | 8d27be2633f2fc543a6d00d66dcb033798d44749 (diff) | |
freedreno/a3xx: add logicop
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/drivers/freedreno/a3xx/fd3_blend.c | 27 | ||||
| -rw-r--r-- | src/gallium/drivers/freedreno/a3xx/fd3_draw.c | 2 | ||||
| -rw-r--r-- | src/gallium/drivers/freedreno/a3xx/fd3_gmem.c | 4 |
3 files changed, 27 insertions, 6 deletions
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_blend.c b/src/gallium/drivers/freedreno/a3xx/fd3_blend.c index 395228d4589..71cdc121852 100644 --- a/src/gallium/drivers/freedreno/a3xx/fd3_blend.c +++ b/src/gallium/drivers/freedreno/a3xx/fd3_blend.c @@ -39,11 +39,29 @@ fd3_blend_state_create(struct pipe_context *pctx, const struct pipe_blend_state *cso) { struct fd3_blend_stateobj *so; + enum a3xx_rop_code rop = ROP_COPY; + bool reads_dest = false; int i; if (cso->logicop_enable) { - DBG("Unsupported! logicop"); - return NULL; + rop = cso->logicop_func; /* maps 1:1 */ + + switch (cso->logicop_func) { + case PIPE_LOGICOP_NOR: + case PIPE_LOGICOP_AND_INVERTED: + case PIPE_LOGICOP_AND_REVERSE: + case PIPE_LOGICOP_INVERT: + case PIPE_LOGICOP_XOR: + case PIPE_LOGICOP_NAND: + case PIPE_LOGICOP_AND: + case PIPE_LOGICOP_EQUIV: + case PIPE_LOGICOP_NOOP: + case PIPE_LOGICOP_OR_INVERTED: + case PIPE_LOGICOP_OR_REVERSE: + case PIPE_LOGICOP_OR: + reads_dest = true; + break; + } } if (cso->independent_blend_enable) { @@ -70,7 +88,7 @@ fd3_blend_state_create(struct pipe_context *pctx, A3XX_RB_MRT_BLEND_CONTROL_CLAMP_ENABLE; so->rb_mrt[i].control = - A3XX_RB_MRT_CONTROL_ROP_CODE(12) | + A3XX_RB_MRT_CONTROL_ROP_CODE(rop) | A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE(rt->colormask); if (rt->blend_enable) @@ -79,6 +97,9 @@ fd3_blend_state_create(struct pipe_context *pctx, A3XX_RB_MRT_CONTROL_BLEND | A3XX_RB_MRT_CONTROL_BLEND2; + if (reads_dest) + so->rb_mrt[i].control |= A3XX_RB_MRT_CONTROL_READ_DEST_ENABLE; + if (cso->dither) so->rb_mrt[i].control |= A3XX_RB_MRT_CONTROL_DITHER_MODE(DITHER_ALWAYS); } diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_draw.c b/src/gallium/drivers/freedreno/a3xx/fd3_draw.c index a482aec3dec..be710d16013 100644 --- a/src/gallium/drivers/freedreno/a3xx/fd3_draw.c +++ b/src/gallium/drivers/freedreno/a3xx/fd3_draw.c @@ -228,7 +228,7 @@ fd3_clear(struct fd_context *ctx, unsigned buffers, for (i = 0; i < 4; i++) { OUT_PKT0(ring, REG_A3XX_RB_MRT_CONTROL(i), 1); - OUT_RING(ring, A3XX_RB_MRT_CONTROL_ROP_CODE(12) | + OUT_RING(ring, A3XX_RB_MRT_CONTROL_ROP_CODE(ROP_COPY) | A3XX_RB_MRT_CONTROL_DITHER_MODE(DITHER_ALWAYS) | A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE(ce)); diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c index 0f0cf3104c5..a4845446633 100644 --- a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c +++ b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c @@ -436,7 +436,7 @@ fd3_emit_tile_mem2gmem(struct fd_context *ctx, struct fd_tile *tile) for (i = 0; i < 4; i++) { OUT_PKT0(ring, REG_A3XX_RB_MRT_CONTROL(i), 1); - OUT_RING(ring, A3XX_RB_MRT_CONTROL_ROP_CODE(12) | + OUT_RING(ring, A3XX_RB_MRT_CONTROL_ROP_CODE(ROP_COPY) | A3XX_RB_MRT_CONTROL_DITHER_MODE(DITHER_DISABLE) | A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE(0xf)); @@ -674,7 +674,7 @@ emit_binning_pass(struct fd_context *ctx) for (i = 0; i < 4; i++) { OUT_PKT0(ring, REG_A3XX_RB_MRT_CONTROL(i), 1); - OUT_RING(ring, A3XX_RB_MRT_CONTROL_ROP_CODE(0) | + OUT_RING(ring, A3XX_RB_MRT_CONTROL_ROP_CODE(ROP_CLEAR) | A3XX_RB_MRT_CONTROL_DITHER_MODE(DITHER_DISABLE) | A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE(0)); } |