diff options
author | Matt Turner <[email protected]> | 2017-12-11 13:59:13 -0800 |
---|---|---|
committer | Matt Turner <[email protected]> | 2018-02-28 11:15:47 -0800 |
commit | bb428454a9d70e5f5984269e6c4a7f5d6e2871d9 (patch) | |
tree | bef11c4a30d7d2726677cfe9cd6e04e7ccdf0995 /src | |
parent | 5e42103f3be5cfaaa374442e009c101403c143bd (diff) |
intel: Disable 64-bit extensions on platforms without 64-bit types
Gen11 does not support DF, Q, UQ types in hardware. As a result, we have
to disable some GL extensions until they can be reimplemented.
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Iago Toral Quiroga <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/intel/common/gen_device_info.c | 3 | ||||
-rw-r--r-- | src/intel/common/gen_device_info.h | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_extensions.c | 9 |
3 files changed, 9 insertions, 4 deletions
diff --git a/src/intel/common/gen_device_info.c b/src/intel/common/gen_device_info.c index 11a4480ebf1..7bed806b369 100644 --- a/src/intel/common/gen_device_info.c +++ b/src/intel/common/gen_device_info.c @@ -197,6 +197,7 @@ static const struct gen_device_info gen_device_info_snb_gt2 = { .must_use_separate_stencil = true, \ .has_llc = true, \ .has_pln = true, \ + .has_64bit_types = true, \ .has_surface_tile_offset = true, \ .timestamp_frequency = 12500000 @@ -381,6 +382,7 @@ static const struct gen_device_info gen_device_info_hsw_gt3 = { .has_llc = true, \ .has_sample_with_hiz = false, \ .has_pln = true, \ + .has_64bit_types = true, \ .supports_simd16_3src = true, \ .has_surface_tile_offset = true, \ .max_vs_threads = 504, \ @@ -815,6 +817,7 @@ static const struct gen_device_info gen_device_info_cnl_5x8 = { #define GEN11_FEATURES(_gt, _slices, _subslices, _l3) \ GEN8_FEATURES, \ GEN11_HW_INFO, \ + .has_64bit_types = false, \ .gt = _gt, .num_slices = _slices, .l3_banks = _l3, \ .num_subslices = _subslices diff --git a/src/intel/common/gen_device_info.h b/src/intel/common/gen_device_info.h index 3e9c087f58c..9b635ff178f 100644 --- a/src/intel/common/gen_device_info.h +++ b/src/intel/common/gen_device_info.h @@ -59,6 +59,7 @@ struct gen_device_info bool has_llc; bool has_pln; + bool has_64bit_types; bool has_compr4; bool has_surface_tile_offset; bool supports_simd16_3src; diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index 127371c5b83..73a6c73f537 100644 --- a/src/mesa/drivers/dri/i965/intel_extensions.c +++ b/src/mesa/drivers/dri/i965/intel_extensions.c @@ -218,7 +218,7 @@ intelInitExtensions(struct gl_context *ctx) ctx->Extensions.ARB_derivative_control = true; ctx->Extensions.ARB_framebuffer_no_attachments = true; ctx->Extensions.ARB_gpu_shader5 = true; - ctx->Extensions.ARB_gpu_shader_fp64 = true; + ctx->Extensions.ARB_gpu_shader_fp64 = devinfo->has_64bit_types; ctx->Extensions.ARB_shader_atomic_counters = true; ctx->Extensions.ARB_shader_atomic_counter_ops = true; ctx->Extensions.ARB_shader_clock = true; @@ -230,7 +230,7 @@ intelInitExtensions(struct gl_context *ctx) ctx->Extensions.ARB_texture_compression_bptc = true; ctx->Extensions.ARB_texture_view = true; ctx->Extensions.ARB_shader_storage_buffer_object = true; - ctx->Extensions.ARB_vertex_attrib_64bit = true; + ctx->Extensions.ARB_vertex_attrib_64bit = devinfo->has_64bit_types; ctx->Extensions.EXT_shader_samples_identical = true; ctx->Extensions.OES_primitive_bounding_box = true; ctx->Extensions.OES_texture_buffer = true; @@ -280,8 +280,9 @@ intelInitExtensions(struct gl_context *ctx) } if (devinfo->gen >= 8) { - ctx->Extensions.ARB_gpu_shader_int64 = true; - ctx->Extensions.ARB_shader_ballot = true; /* requires ARB_gpu_shader_int64 */ + ctx->Extensions.ARB_gpu_shader_int64 = devinfo->has_64bit_types; + /* requires ARB_gpu_shader_int64 */ + ctx->Extensions.ARB_shader_ballot = devinfo->has_64bit_types; ctx->Extensions.ARB_ES3_2_compatibility = true; } |