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authorSamuel Pitoiset <[email protected]>2016-08-24 20:22:52 +0200
committerSamuel Pitoiset <[email protected]>2016-08-24 22:26:36 +0200
commita227b0a4f1354f145ff49183b687dd7541a24c86 (patch)
tree09348d253c6a885d4946d8af615e08507bfe408f /src
parentc9c989763aa7ad636407cb33c27d586e6f559d7a (diff)
nvc0: invalidate textures/samplers on GK104+
Like Fermi, textures and samplers are aliased between 3D and compute, especially the TIC_FLUSH/TSC_FLUSH methods and we have to re-validate these resources when switching between the two pipelines. This fixes a GPU hang with Elemental (and most likely with other UE4 demos). Tested on GK107 and GM107. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> CC: <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nvc0_tex.c20
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nve4_compute.c14
2 files changed, 22 insertions, 12 deletions
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
index 4fa262195f3..cbc270d9f19 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
@@ -605,13 +605,11 @@ void nvc0_validate_textures(struct nvc0_context *nvc0)
PUSH_DATA (nvc0->base.pushbuf, 0);
}
- if (nvc0->screen->base.class_3d < NVE4_3D_CLASS) {
- /* Invalidate all CP textures because they are aliased. */
- for (int i = 0; i < nvc0->num_textures[5]; i++)
- nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_CP_TEX(i));
- nvc0->textures_dirty[5] = ~0;
- nvc0->dirty_cp |= NVC0_NEW_CP_TEXTURES;
- }
+ /* Invalidate all CP textures because they are aliased. */
+ for (int i = 0; i < nvc0->num_textures[5]; i++)
+ nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_CP_TEX(i));
+ nvc0->textures_dirty[5] = ~0;
+ nvc0->dirty_cp |= NVC0_NEW_CP_TEXTURES;
}
bool
@@ -716,11 +714,9 @@ void nvc0_validate_samplers(struct nvc0_context *nvc0)
PUSH_DATA (nvc0->base.pushbuf, 0);
}
- if (nvc0->screen->base.class_3d < NVE4_3D_CLASS) {
- /* Invalidate all CP samplers because they are aliased. */
- nvc0->samplers_dirty[5] = ~0;
- nvc0->dirty_cp |= NVC0_NEW_CP_SAMPLERS;
- }
+ /* Invalidate all CP samplers because they are aliased. */
+ nvc0->samplers_dirty[5] = ~0;
+ nvc0->dirty_cp |= NVC0_NEW_CP_SAMPLERS;
}
/* Upload the "diagonal" entries for the possible texture sources ($t == $s).
diff --git a/src/gallium/drivers/nouveau/nvc0/nve4_compute.c b/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
index f1ea4d95b91..e85e9b48b7f 100644
--- a/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
+++ b/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
@@ -304,7 +304,13 @@ nve4_compute_validate_samplers(struct nvc0_context *nvc0)
BEGIN_NVC0(nvc0->base.pushbuf, NVE4_CP(TSC_FLUSH), 1);
PUSH_DATA (nvc0->base.pushbuf, 0);
}
+
+ /* Invalidate all 3D samplers because they are aliased. */
+ for (int s = 0; s < 5; s++)
+ nvc0->samplers_dirty[s] = ~0;
+ nvc0->dirty_3d |= NVC0_NEW_3D_SAMPLERS;
}
+
/* (Code duplicated at bottom for various non-convincing reasons.
* E.g. we might want to use the COMPUTE subchannel to upload TIC/TSC
* entries to avoid a subchannel switch.
@@ -754,6 +760,14 @@ nve4_compute_validate_textures(struct nvc0_context *nvc0)
}
nvc0->state.num_textures[s] = nvc0->num_textures[s];
+
+ /* Invalidate all 3D textures because they are aliased. */
+ for (int s = 0; s < 5; s++) {
+ for (int i = 0; i < nvc0->num_textures[s]; i++)
+ nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_TEX(s, i));
+ nvc0->textures_dirty[s] = ~0;
+ }
+ nvc0->dirty_3d |= NVC0_NEW_3D_TEXTURES;
}