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authorEric Anholt <[email protected]>2014-10-08 22:26:58 +0200
committerEric Anholt <[email protected]>2014-10-08 22:47:39 +0200
commit9773d4590817f3714065b2e8c301c34aa40e30c1 (patch)
tree51846164257ead52a11c5ad48a5c900c9b7a5d41 /src
parent4e50a32be6343bdcdbdb9e163bb3402216c72496 (diff)
vc4: Fix scalar math opcodes to replicate their result from the X channel.
Thanks to robclark for pointing out that I was probably failing to do this when I reported a "bug" in his lowering code.
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/vc4/vc4_program.c20
1 files changed, 16 insertions, 4 deletions
diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c
index 030577b196d..f1f014532b1 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -275,6 +275,18 @@ tgsi_to_qir_alu(struct vc4_compile *c,
}
static struct qreg
+tgsi_to_qir_scalar(struct vc4_compile *c,
+ struct tgsi_full_instruction *tgsi_inst,
+ enum qop op, struct qreg *src, int i)
+{
+ struct qreg dst = qir_get_temp(c);
+ qir_emit(c, qir_inst(op, dst,
+ src[0 * 4 + 0],
+ c->undef));
+ return dst;
+}
+
+static struct qreg
qir_srgb_decode(struct vc4_compile *c, struct qreg srgb)
{
struct qreg low = qir_FMUL(c, srgb, qir_uniform_f(c, 1.0 / 12.92));
@@ -1081,10 +1093,10 @@ emit_tgsi_instruction(struct vc4_compile *c,
[TGSI_OPCODE_CMP] = { 0, tgsi_to_qir_cmp },
[TGSI_OPCODE_MAD] = { 0, tgsi_to_qir_mad },
- [TGSI_OPCODE_RCP] = { QOP_RCP, tgsi_to_qir_alu },
- [TGSI_OPCODE_RSQ] = { QOP_RSQ, tgsi_to_qir_alu },
- [TGSI_OPCODE_EX2] = { QOP_EXP2, tgsi_to_qir_alu },
- [TGSI_OPCODE_LG2] = { QOP_LOG2, tgsi_to_qir_alu },
+ [TGSI_OPCODE_RCP] = { QOP_RCP, tgsi_to_qir_scalar },
+ [TGSI_OPCODE_RSQ] = { QOP_RSQ, tgsi_to_qir_scalar },
+ [TGSI_OPCODE_EX2] = { QOP_EXP2, tgsi_to_qir_scalar },
+ [TGSI_OPCODE_LG2] = { QOP_LOG2, tgsi_to_qir_scalar },
[TGSI_OPCODE_LIT] = { 0, tgsi_to_qir_lit },
[TGSI_OPCODE_LRP] = { 0, tgsi_to_qir_lrp },
[TGSI_OPCODE_TRUNC] = { 0, tgsi_to_qir_trunc },