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authorNicolai Hähnle <[email protected]>2016-07-29 17:59:11 +0100
committerNicolai Hähnle <[email protected]>2016-08-08 12:53:06 +0200
commit96bbb620a5952828cabe27ef7eb3adaa3f2226f4 (patch)
treeb1ad4bda2ecb580e27a28798f806c0b74543250b /src
parent5c343cce0f33e534481317ea99cf8192960d5e9f (diff)
radeonsi: add has_draw_indirect_multi flag
Prefer to use DRAW_(INDEX)_INDIRECT_MULTI when available in the firmware. Versions for SI and CI already added as provided by the firmware team, but keep in mind that they won't currently be used since the radeon kernel module has no interface to query the firmware version. Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c12
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.h1
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c2
3 files changed, 14 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index e33823dcede..ffeeda3f2a3 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -785,6 +785,18 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
sscreen->b.chip_class >= VI &&
sscreen->b.info.max_se >= 2;
+ sscreen->has_draw_indirect_multi =
+ (sscreen->b.family >= CHIP_POLARIS10) ||
+ (sscreen->b.chip_class == VI &&
+ sscreen->b.info.pfp_fw_version >= 121 &&
+ sscreen->b.info.me_fw_version >= 87) ||
+ (sscreen->b.chip_class == CIK &&
+ sscreen->b.info.pfp_fw_version >= 211 &&
+ sscreen->b.info.me_fw_version >= 173) ||
+ (sscreen->b.chip_class == SI &&
+ sscreen->b.info.pfp_fw_version >= 121 &&
+ sscreen->b.info.me_fw_version >= 87);
+
sscreen->b.has_cp_dma = true;
sscreen->b.has_streamout = true;
pipe_mutex_init(sscreen->shader_parts_mutex);
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 55f8965d2d4..9e6bd78711b 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -85,6 +85,7 @@ struct si_screen {
unsigned gs_table_depth;
unsigned tess_offchip_block_dw_size;
bool has_distributed_tess;
+ bool has_draw_indirect_multi;
/* Whether shaders are monolithic (1-part) or separate (3-part). */
bool use_monolithic_shaders;
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 8f26f8cc410..a60723d225d 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -634,7 +634,7 @@ static void si_emit_draw_packets(struct si_context *sctx,
radeon_emit(cs, index_max_size);
}
- if (sctx->b.family < CHIP_POLARIS10) {
+ if (!sctx->screen->has_draw_indirect_multi) {
radeon_emit(cs, PKT3(info->indexed ? PKT3_DRAW_INDEX_INDIRECT
: PKT3_DRAW_INDIRECT,
3, render_cond_bit));