diff options
author | Jordan Justen <[email protected]> | 2015-03-19 22:33:16 -0700 |
---|---|---|
committer | Jordan Justen <[email protected]> | 2015-03-31 16:40:24 -0700 |
commit | 7ecf3530d87e88971fd77d35ac23c5383630d35b (patch) | |
tree | df8cbd5f787a00b7ca459607b5b76326290b4cb0 /src | |
parent | 4e56a9ad46ff7fe85308ce12e21719ff2b476516 (diff) |
i965/state: Don't use brw->state.dirty.mesa
Now, we only use brw->NewGLState.
I used this bash & sed command in the i965 directory:
for file in *.[ch] *.[ch]pp; do
sed -i -e 's/brw->state\.dirty\.mesa/brw->NewGLState/g' $file
done
Followed by manual changes to brw_state_upload.c.
Signed-off-by: Jordan Justen <[email protected]>
Reviewed-by: Kristian Høgsberg <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_state.h | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_state_cache.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_state_upload.c | 13 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen8_depth_state.c | 2 |
5 files changed, 11 insertions, 12 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c index d45f1e6d517..06916e28cbd 100644 --- a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c +++ b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c @@ -400,7 +400,7 @@ use_rectlist(struct brw_context *brw, bool enable) * _NEW_BUFFERS to make sure we emit new SURFACE_STATE with the new fast * clear color value. */ - brw->state.dirty.mesa |= _NEW_LIGHT | _NEW_BUFFERS; + brw->NewGLState |= _NEW_LIGHT | _NEW_BUFFERS; brw->ctx.NewDriverState |= BRW_NEW_FRAGMENT_PROGRAM; } @@ -602,7 +602,7 @@ brw_meta_fast_clear(struct brw_context *brw, struct gl_framebuffer *fb, * color before resolve and sets irb->mt->fast_clear_state to UNRESOLVED if * we render to it. */ - brw->state.dirty.mesa |= _NEW_BUFFERS; + brw->NewGLState |= _NEW_BUFFERS; /* Set the custom state back to normal and dirty the same bits as above */ diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index bb920b22167..cfa67b694d4 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src/mesa/drivers/dri/i965/brw_state.h @@ -155,7 +155,7 @@ extern const struct brw_tracked_state gen8_vs_state; static inline bool brw_state_dirty(struct brw_context *brw, GLuint mesa_flags, uint64_t brw_flags) { - return ((brw->state.dirty.mesa & mesa_flags) | + return ((brw->NewGLState & mesa_flags) | (brw->ctx.NewDriverState & brw_flags)) != 0; } diff --git a/src/mesa/drivers/dri/i965/brw_state_cache.c b/src/mesa/drivers/dri/i965/brw_state_cache.c index bfe7e514964..89508e4bd2f 100644 --- a/src/mesa/drivers/dri/i965/brw_state_cache.c +++ b/src/mesa/drivers/dri/i965/brw_state_cache.c @@ -399,7 +399,7 @@ brw_clear_cache(struct brw_context *brw, struct brw_cache *cache) /* We need to make sure that the programs get regenerated, since * any offsets leftover in brw_context will no longer be valid. */ - brw->state.dirty.mesa |= ~0; + brw->NewGLState |= ~0; brw->ctx.NewDriverState |= ~0ull; intel_batchbuffer_flush(brw); } diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index 255e8927f43..f6369066100 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -438,7 +438,7 @@ void brw_init_state( struct brw_context *brw ) brw_upload_initial_gpu_state(brw); - brw->state.dirty.mesa = ~0; + brw->NewGLState = ~0; brw->ctx.NewDriverState = ~0ull; /* ~0 is a nonsensical value which won't match anything we program, so @@ -623,7 +623,8 @@ static inline void merge_ctx_state(struct brw_context *brw, struct brw_state_flags *state) { - state->mesa |= brw->state.dirty.mesa; + state->mesa |= brw->NewGLState; + assert(brw->state.dirty.mesa == 0); state->brw |= brw->ctx.NewDriverState; assert(brw->state.dirty.brw == 0ull); } @@ -649,12 +650,9 @@ brw_upload_pipeline_state(struct brw_context *brw, static int dirty_count = 0; struct brw_state_flags state = brw->state.pipelines[pipeline]; - brw_state->mesa |= brw->NewGLState; - brw->NewGLState = 0; - if (0) { /* Always re-emit all state. */ - brw_state->mesa |= ~0; + brw->NewGLState = ~0; ctx->NewDriverState = ~0ull; } @@ -765,13 +763,14 @@ brw_pipeline_state_finished(struct brw_context *brw, /* Save all dirty state into the other pipelines */ for (int i = 0; i < BRW_NUM_PIPELINES; i++) { if (i != pipeline) { - brw->state.pipelines[i].mesa |= state->mesa; + brw->state.pipelines[i].mesa |= brw->NewGLState; brw->state.pipelines[i].brw |= brw->ctx.NewDriverState; } else { memset(&brw->state.pipelines[i], 0, sizeof(struct brw_state_flags)); } } + brw->NewGLState = 0; brw->ctx.NewDriverState = 0ull; memset(state, 0, sizeof(*state)); } diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri/i965/gen8_depth_state.c index 3d126cf98e5..b502650f991 100644 --- a/src/mesa/drivers/dri/i965/gen8_depth_state.c +++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c @@ -509,5 +509,5 @@ gen8_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt, * * Setting _NEW_DEPTH and _NEW_BUFFERS covers it, but is rather overkill. */ - brw->state.dirty.mesa |= _NEW_DEPTH | _NEW_BUFFERS; + brw->NewGLState |= _NEW_DEPTH | _NEW_BUFFERS; } |