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authorMatt Turner <[email protected]>2013-04-23 17:10:20 -0700
committerMatt Turner <[email protected]>2013-08-27 15:03:30 -0700
commit6829c18609fc3c979133b462173141dd7dfd09c3 (patch)
tree35b9c213eef41bbcd8b812ac0dcda6c1ad89db72 /src
parentadb93e3bda13ed539f383787c09f948d0f27fbcb (diff)
glsl: Add new fma built-in IR and prototype from ARB_gpu_shader5.
Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/glsl/builtins/ir/fma.ir29
-rw-r--r--src/glsl/builtins/profiles/ARB_gpu_shader5.glsl5
2 files changed, 34 insertions, 0 deletions
diff --git a/src/glsl/builtins/ir/fma.ir b/src/glsl/builtins/ir/fma.ir
new file mode 100644
index 00000000000..c3695634db4
--- /dev/null
+++ b/src/glsl/builtins/ir/fma.ir
@@ -0,0 +1,29 @@
+((function fma
+ (signature float
+ (parameters
+ (declare (in) float a)
+ (declare (in) float b)
+ (declare (in) float c))
+ ((return (expression float fma (var_ref a) (var_ref b) (var_ref c)))))
+
+ (signature vec2
+ (parameters
+ (declare (in) vec2 a)
+ (declare (in) vec2 b)
+ (declare (in) vec2 c))
+ ((return (expression vec2 fma (var_ref a) (var_ref b) (var_ref c)))))
+
+ (signature vec3
+ (parameters
+ (declare (in) vec3 a)
+ (declare (in) vec3 b)
+ (declare (in) vec3 c))
+ ((return (expression vec3 fma (var_ref a) (var_ref b) (var_ref c)))))
+
+ (signature vec4
+ (parameters
+ (declare (in) vec4 a)
+ (declare (in) vec4 b)
+ (declare (in) vec4 c))
+ ((return (expression vec4 fma (var_ref a) (var_ref b) (var_ref c)))))
+))
diff --git a/src/glsl/builtins/profiles/ARB_gpu_shader5.glsl b/src/glsl/builtins/profiles/ARB_gpu_shader5.glsl
index 458300f9ba5..3f76283f542 100644
--- a/src/glsl/builtins/profiles/ARB_gpu_shader5.glsl
+++ b/src/glsl/builtins/profiles/ARB_gpu_shader5.glsl
@@ -54,3 +54,8 @@ int findMSB(uint value);
ivec2 findMSB(uvec2 value);
ivec3 findMSB(uvec3 value);
ivec4 findMSB(uvec4 value);
+
+float fma(float a, float b, float c);
+vec2 fma(vec2 a, vec2 b, vec2 c);
+vec3 fma(vec3 a, vec3 b, vec3 c);
+vec4 fma(vec4 a, vec4 b, vec4 c);