diff options
| author | Marek Olšák <[email protected]> | 2016-05-12 13:13:42 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2016-05-19 12:35:50 +0200 |
| commit | 54737aabb9ec914baed43656b88e39f1153c7ff9 (patch) | |
| tree | a39de79e6def5a0d4fd0eaf4e455f71e13a73e9b /src | |
| parent | f330b7a14fd913c50a5df227ee3d5699113357d1 (diff) | |
gallium/radeon: don't set PB_USAGE in winsyses
There is no point.
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 2 | ||||
| -rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 2 |
2 files changed, 0 insertions, 4 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c index ed12f3073d9..bd6979099d4 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c @@ -560,7 +560,6 @@ static struct pb_buffer *amdgpu_bo_from_handle(struct radeon_winsys *rws, pipe_reference_init(&bo->base.reference, 1); bo->base.alignment = info.phys_alignment; - bo->base.usage = PB_USAGE_GPU_WRITE | PB_USAGE_GPU_READ; bo->bo = result.buf_handle; bo->base.size = result.alloc_size; bo->base.vtbl = &amdgpu_winsys_bo_vtbl; @@ -659,7 +658,6 @@ static struct pb_buffer *amdgpu_bo_from_ptr(struct radeon_winsys *rws, pipe_reference_init(&bo->base.reference, 1); bo->bo = buf_handle; bo->base.alignment = 0; - bo->base.usage = PB_USAGE_GPU_WRITE | PB_USAGE_GPU_READ; bo->base.size = size; bo->base.vtbl = &amdgpu_winsys_bo_vtbl; bo->ws = ws; diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c index b07afe67f40..950cbb3e55f 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c @@ -796,7 +796,6 @@ static struct pb_buffer *radeon_winsys_bo_from_ptr(struct radeon_winsys *rws, pipe_reference_init(&bo->base.reference, 1); bo->handle = args.handle; bo->base.alignment = 0; - bo->base.usage = PB_USAGE_GPU_WRITE | PB_USAGE_GPU_READ; bo->base.size = size; bo->base.vtbl = &radeon_bo_vtbl; bo->rws = ws; @@ -924,7 +923,6 @@ static struct pb_buffer *radeon_winsys_bo_from_handle(struct radeon_winsys *rws, /* Initialize it. */ pipe_reference_init(&bo->base.reference, 1); bo->base.alignment = 0; - bo->base.usage = PB_USAGE_GPU_WRITE | PB_USAGE_GPU_READ; bo->base.size = (unsigned) size; bo->base.vtbl = &radeon_bo_vtbl; bo->rws = ws; |