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authorDave Airlie <[email protected]>2017-02-03 03:26:13 +0000
committerDave Airlie <[email protected]>2017-02-03 19:53:03 +0000
commit106a51440d018031b94c91758eecc7424a3bb5ee (patch)
treef7c5156fc4fa17ccb0fa2afecc430f5bba0d42b7 /src
parenta1a8aef4c9dbdf254036adada95f0d6e394c5d6a (diff)
radv: fix shared memory load/stores.
If we have an indirect index here we need to scale it by attribute slots e.g. is this is vec2[256] then we get an indir_index in the 0.255 range but the vec2 are aligned inside vec4 slots. So scale the indir index, then extract the channels. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "17.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/amd/common/ac_nir_to_llvm.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 9be6e77f86b..566516fd8a3 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2237,6 +2237,9 @@ static LLVMValueRef visit_load_var(struct nir_to_llvm_context *ctx,
LLVMValueRef ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
LLVMValueRef derived_ptr;
+ if (indir_index)
+ indir_index = LLVMBuildMul(ctx->builder, indir_index, LLVMConstInt(ctx->i32, 4, false), "");
+
for (unsigned chan = 0; chan < ve; chan++) {
LLVMValueRef index = LLVMConstInt(ctx->i32, chan, false);
if (indir_index)
@@ -2343,6 +2346,10 @@ visit_store_var(struct nir_to_llvm_context *ctx,
break;
case nir_var_shared: {
LLVMValueRef ptr = get_shared_memory_ptr(ctx, idx, ctx->i32);
+
+ if (indir_index)
+ indir_index = LLVMBuildMul(ctx->builder, indir_index, LLVMConstInt(ctx->i32, 4, false), "");
+
for (unsigned chan = 0; chan < 8; chan++) {
if (!(writemask & (1 << chan)))
continue;