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authorTimothy Arceri <[email protected]>2019-07-31 14:06:46 +1000
committerTimothy Arceri <[email protected]>2019-10-26 13:04:12 +1100
commitcff53da3748df296d104fe91fca13111296ce527 (patch)
treeced666e15c064b388b7b9f124d202a74e0f20db9 /src
parent57c95d2ce239dbec7212b2879901e455ef29fc6c (diff)
radv: enable secure compile support
Can be enabled via the environment variable which tells the driver how many compilation threads are expected to be called, and therefore how many forked processes the driver should create. For example we would expect to call fossilize replay with something like this: RADV_SECURE_COMPILE_THREADS=8 ./fossilize-replay --num-threads 8 \ --shader-cache-size 0 --ignore-derived-pipelines pipeline_cache.foz Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/amd/vulkan/radv_device.c11
-rw-r--r--src/amd/vulkan/radv_pipeline.c18
2 files changed, 26 insertions, 3 deletions
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 10211c8f9bc..d86a1dbca02 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -619,9 +619,19 @@ VkResult radv_CreateInstance(
instance->apiVersion = client_version;
instance->physicalDeviceCount = -1;
+ /* Get secure compile thread count. NOTE: We cap this at 32 */
+#define MAX_SC_PROCS 32
+ char *num_sc_threads = getenv("RADV_SECURE_COMPILE_THREADS");
+ if (num_sc_threads)
+ instance->num_sc_threads = MIN2(strtoul(num_sc_threads, NULL, 10), MAX_SC_PROCS);
+
instance->debug_flags = parse_debug_string(getenv("RADV_DEBUG"),
radv_debug_options);
+ /* Disable memory cache when secure compile is set */
+ if (radv_device_use_secure_compile(instance))
+ instance->debug_flags |= RADV_DEBUG_NO_MEMORY_CACHE;
+
instance->perftest_flags = parse_debug_string(getenv("RADV_PERFTEST"),
radv_perftest_options);
@@ -2142,7 +2152,6 @@ static VkResult fork_secure_compile_device(struct radv_device *device)
mtx_init(&device->sc_state->secure_compile_mutex, mtx_plain);
-#define MAX_SC_PROCS 32
uint8_t sc_threads = device->instance->num_sc_threads;
int fd_secure_input[MAX_SC_PROCS][2];
int fd_secure_output[MAX_SC_PROCS][2];
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 2665469bec0..beb72c67541 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -4791,7 +4791,13 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
}
struct radv_pipeline_key key = radv_generate_graphics_pipeline_key(pipeline, pCreateInfo, &blend, has_view_index);
- radv_create_shaders(pipeline, device, cache, &key, pStages, pCreateInfo->flags, pipeline_feedback, stage_feedbacks);
+ if (radv_device_use_secure_compile(device->instance)) {
+ radv_secure_compile(pipeline, device, &key, pStages, pCreateInfo->flags, pCreateInfo->stageCount);
+ /* TODO: should we actualy return failure ??? */
+ return VK_SUCCESS;
+ } else {
+ radv_create_shaders(pipeline, device, cache, &key, pStages, pCreateInfo->flags, pipeline_feedback, stage_feedbacks);
+ }
pipeline->graphics.spi_baryc_cntl = S_0286E0_FRONT_FACE_ALL_BITS(1);
radv_pipeline_init_multisample_state(pipeline, &blend, pCreateInfo);
@@ -5049,7 +5055,15 @@ static VkResult radv_compute_pipeline_create(
stage_feedbacks[MESA_SHADER_COMPUTE] = &creation_feedback->pPipelineStageCreationFeedbacks[0];
pStages[MESA_SHADER_COMPUTE] = &pCreateInfo->stage;
- radv_create_shaders(pipeline, device, cache, &(struct radv_pipeline_key) {0}, pStages, pCreateInfo->flags, pipeline_feedback, stage_feedbacks);
+
+ if (radv_device_use_secure_compile(device->instance)) {
+ radv_secure_compile(pipeline, device, &(struct radv_pipeline_key) {0}, pStages, pCreateInfo->flags, 1);
+ *pPipeline = radv_pipeline_to_handle(pipeline);
+ /* TODO: should we actualy return failure ??? */
+ return VK_SUCCESS;
+ } else {
+ radv_create_shaders(pipeline, device, cache, &(struct radv_pipeline_key) {0}, pStages, pCreateInfo->flags, pipeline_feedback, stage_feedbacks);
+ }
pipeline->user_data_0[MESA_SHADER_COMPUTE] = radv_pipeline_stage_to_user_data_0(pipeline, MESA_SHADER_COMPUTE, device->physical_device->rad_info.chip_class);
pipeline->need_indirect_descriptor_sets |= pipeline->shaders[MESA_SHADER_COMPUTE]->info.need_indirect_descriptor_sets;