diff options
author | Sagar Ghuge <[email protected]> | 2018-11-15 16:19:39 -0800 |
---|---|---|
committer | Francisco Jerez <[email protected]> | 2019-10-11 12:24:16 -0700 |
commit | a12533f2ce2e5a4aeae0f1fc8d759de73bdb6e2d (patch) | |
tree | 09c3383f26084da1fb916e8597010d7af62336b3 /src | |
parent | 5291283af0fbcbc96888f63f78bd6480fc70fcc1 (diff) |
intel/eu/gen12: Implement immediate 64 bit constant encoding.
On Gen12, 64 bit immediate constants are loaded in reverse order. Lower
32 bit gets loaded from bit 96-127 and higher 32 bits from 64-95 in
instruction encoding.
Signed-off-by: Sagar Ghuge <[email protected]>
Co-authored-by: Matt Turner <[email protected]>
Reviewed-by: Francisco Jerez <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/intel/compiler/brw_inst.h | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/src/intel/compiler/brw_inst.h b/src/intel/compiler/brw_inst.h index fdc6cd76225..f5a65fea40d 100644 --- a/src/intel/compiler/brw_inst.h +++ b/src/intel/compiler/brw_inst.h @@ -1136,7 +1136,13 @@ brw_inst_set_imm_df(const struct gen_device_info *devinfo, } dt; (void) devinfo; dt.d = value; - brw_inst_set_bits(insn, 127, 64, dt.u); + + if (devinfo->gen >= 12) { + brw_inst_set_bits(insn, 95, 64, dt.u >> 32); + brw_inst_set_bits(insn, 127, 96, dt.u & 0xFFFFFFFF); + } else { + brw_inst_set_bits(insn, 127, 64, dt.u); + } } static inline void @@ -1144,7 +1150,12 @@ brw_inst_set_imm_uq(const struct gen_device_info *devinfo, brw_inst *insn, uint64_t value) { (void) devinfo; - brw_inst_set_bits(insn, 127, 64, value); + if (devinfo->gen >= 12) { + brw_inst_set_bits(insn, 95, 64, value >> 32); + brw_inst_set_bits(insn, 127, 96, value & 0xFFFFFFFF); + } else { + brw_inst_set_bits(insn, 127, 64, value); + } } /** @} */ |