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authorNanley Chery <[email protected]>2019-08-12 15:41:11 -0700
committerNanley Chery <[email protected]>2019-10-28 10:47:05 -0700
commit82822bc5497c2cf4643204d12cd0ed3f96ae72e1 (patch)
treed7aa3cddd5374540305259c0d1c2ae9448d020ed /src
parent22be1447bb46b4dc63fbc2cfc696c01a0f90ab0e (diff)
iris: Allow for non-Y-tiled aux allocation
The Gen12 CCS is not Y-tiled. Reviewed-by: Sagar Ghuge <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/iris/iris_resource.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/gallium/drivers/iris/iris_resource.c b/src/gallium/drivers/iris/iris_resource.c
index 46b207ed388..d06bf1b6211 100644
--- a/src/gallium/drivers/iris/iris_resource.c
+++ b/src/gallium/drivers/iris/iris_resource.c
@@ -564,7 +564,8 @@ iris_resource_alloc_separate_aux(struct iris_screen *screen,
* block sizes.
*/
res->aux.bo = iris_bo_alloc_tiled(screen->bufmgr, "aux buffer", size, 4096,
- IRIS_MEMZONE_OTHER, I915_TILING_Y,
+ IRIS_MEMZONE_OTHER,
+ isl_tiling_to_i915_tiling(res->aux.surf.tiling),
res->aux.surf.row_pitch_B, alloc_flags);
if (!res->aux.bo) {
return false;