diff options
| author | Christoph Bumiller <[email protected]> | 2012-05-05 14:36:40 +0200 |
|---|---|---|
| committer | Christoph Bumiller <[email protected]> | 2012-05-09 17:09:30 +0200 |
| commit | 6ae12bac596ce3a6aa8e09f638ad2cb4a7c18e5c (patch) | |
| tree | b38186d6df4facf35098bdfaab267788547c55e4 /src | |
| parent | 8c98635d4fc7437b05debe337aef2377df685c0c (diff) | |
gallium/drivers: handle TGSI_OPCODE_CEIL
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/drivers/i915/i915_fpc_translate.c | 16 | ||||
| -rw-r--r-- | src/gallium/drivers/nv30/nvfx_fragprog.c | 5 | ||||
| -rw-r--r-- | src/gallium/drivers/nv30/nvfx_vertprog.c | 5 | ||||
| -rw-r--r-- | src/gallium/drivers/r600/r600_asm.c | 2 |
4 files changed, 28 insertions, 0 deletions
diff --git a/src/gallium/drivers/i915/i915_fpc_translate.c b/src/gallium/drivers/i915/i915_fpc_translate.c index 94c0c69fcae..def9a03d377 100644 --- a/src/gallium/drivers/i915/i915_fpc_translate.c +++ b/src/gallium/drivers/i915/i915_fpc_translate.c @@ -512,6 +512,22 @@ i915_translate_instruction(struct i915_fp_compile *p, emit_simple_arith(p, inst, A0_ADD, 2, fs); break; + case TGSI_OPCODE_CEIL: + src0 = src_vector(p, &inst->Src[0], fs); + tmp = i915_get_utemp(p); + flags = get_result_flags(inst); + i915_emit_arith(p, + A0_FLR, + tmp, + flags & A0_DEST_CHANNEL_ALL, 0, + negate(src0, 1, 1, 1, 1), 0, 0); + i915_emit_arith(p, + A0_MOV, + get_result_vector(p, &inst->Dst[0]), + flags, 0, + negate(tmp, 1, 1, 1, 1), 0, 0); + break; + case TGSI_OPCODE_CMP: src0 = src_vector(p, &inst->Src[0], fs); src1 = src_vector(p, &inst->Src[1], fs); diff --git a/src/gallium/drivers/nv30/nvfx_fragprog.c b/src/gallium/drivers/nv30/nvfx_fragprog.c index e562b454f92..592ad21c6c8 100644 --- a/src/gallium/drivers/nv30/nvfx_fragprog.c +++ b/src/gallium/drivers/nv30/nvfx_fragprog.c @@ -535,6 +535,11 @@ nvfx_fragprog_parse_instruction(struct nv30_context* nvfx, struct nvfx_fpc *fpc, case TGSI_OPCODE_ADD: nvfx_fp_emit(fpc, arith(sat, ADD, dst, mask, src[0], src[1], none)); break; + case TGSI_OPCODE_CEIL: + tmp = nvfx_src(temp(fpc)); + nvfx_fp_emit(fpc, arith(0, FLR, tmp.reg, mask, neg(src[0]), none, none)); + nvfx_fp_emit(fpc, arith(sat, MOV, dst, mask, neg(tmp), none, none)); + break; case TGSI_OPCODE_CMP: insn = arith(0, MOV, none.reg, mask, src[0], none, none); insn.cc_update = 1; diff --git a/src/gallium/drivers/nv30/nvfx_vertprog.c b/src/gallium/drivers/nv30/nvfx_vertprog.c index d7eb9fb0a63..82972b3943c 100644 --- a/src/gallium/drivers/nv30/nvfx_vertprog.c +++ b/src/gallium/drivers/nv30/nvfx_vertprog.c @@ -550,6 +550,11 @@ nvfx_vertprog_parse_instruction(struct nv30_context *nv30, struct nvfx_vpc *vpc, case TGSI_OPCODE_ARL: nvfx_vp_emit(vpc, arith(0, VEC, ARL, dst, mask, src[0], none, none)); break; + case TGSI_OPCODE_CEIL: + tmp = nvfx_src(temp(vpc)); + nvfx_vp_emit(vpc, arith(0, VEC, FLR, tmp.reg, mask, neg(src[0]), none, none)); + nvfx_vp_emit(vpc, arith(sat, VEC, MOV, dst, mask, neg(tmp), none, none)); + break; case TGSI_OPCODE_CMP: insn = arith(0, VEC, MOV, none.reg, mask, src[0], none, none); insn.cc_update = 1; diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c index 0d67fbd6a04..5a10bd90776 100644 --- a/src/gallium/drivers/r600/r600_asm.c +++ b/src/gallium/drivers/r600/r600_asm.c @@ -94,6 +94,7 @@ static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode * case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT: case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT: case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT: + case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CEIL: case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR: case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC: case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE: @@ -172,6 +173,7 @@ static inline unsigned int r600_bytecode_get_num_operands(struct r600_bytecode * case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV: case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT: case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT: + case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CEIL: case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR: case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC: case EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE: |