diff options
| author | Francisco Jerez <[email protected]> | 2019-02-05 20:53:06 -0800 |
|---|---|---|
| committer | Francisco Jerez <[email protected]> | 2019-10-11 12:24:16 -0700 |
| commit | 0e57dbc55cd7f42a2298dbaa4e18fe97a85fd0d2 (patch) | |
| tree | 15c11724a91613d254d366409159edb9d40b1ae9 /src | |
| parent | 7499e10383bb4182b1bf3edb90e1915fdf0c6d33 (diff) | |
intel/ir/gen12: Add SYNC hardware instruction.
Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/intel/compiler/brw_eu.cpp | 1 | ||||
| -rw-r--r-- | src/intel/compiler/brw_eu_defines.h | 1 | ||||
| -rw-r--r-- | src/intel/compiler/brw_shader.cpp | 1 |
3 files changed, 3 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_eu.cpp b/src/intel/compiler/brw_eu.cpp index a8c3e55f65f..54c8511ae8d 100644 --- a/src/intel/compiler/brw_eu.cpp +++ b/src/intel/compiler/brw_eu.cpp @@ -467,6 +467,7 @@ enum gen { static const struct opcode_desc opcode_descs[] = { /* IR, HW, name, nsrc, ndst, gens */ { BRW_OPCODE_ILLEGAL, 0, "illegal", 0, 0, GEN_ALL }, + { BRW_OPCODE_SYNC, 1, "sync", 1, 0, GEN_GE(GEN12) }, { BRW_OPCODE_MOV, 1, "mov", 1, 1, GEN_LT(GEN12) }, { BRW_OPCODE_MOV, 97, "mov", 1, 1, GEN_GE(GEN12) }, { BRW_OPCODE_SEL, 2, "sel", 2, 1, GEN_LT(GEN12) }, diff --git a/src/intel/compiler/brw_eu_defines.h b/src/intel/compiler/brw_eu_defines.h index 6250b50c691..7252e0cb4b1 100644 --- a/src/intel/compiler/brw_eu_defines.h +++ b/src/intel/compiler/brw_eu_defines.h @@ -197,6 +197,7 @@ enum PACKED gen10_align1_3src_dst_horizontal_stride { enum opcode { /* These are the actual hardware instructions. */ BRW_OPCODE_ILLEGAL, + BRW_OPCODE_SYNC, BRW_OPCODE_MOV, BRW_OPCODE_SEL, BRW_OPCODE_MOVI, /**< G45+ */ diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp index 5c6b4dcd6a9..94976a12c00 100644 --- a/src/intel/compiler/brw_shader.cpp +++ b/src/intel/compiler/brw_shader.cpp @@ -1042,6 +1042,7 @@ backend_instruction::has_side_effects() const case SHADER_OPCODE_SEND: return send_has_side_effects; + case BRW_OPCODE_SYNC: case VEC4_OPCODE_UNTYPED_ATOMIC: case SHADER_OPCODE_UNTYPED_ATOMIC_LOGICAL: case SHADER_OPCODE_UNTYPED_ATOMIC_FLOAT_LOGICAL: |