diff options
| author | Marek Olšák <[email protected]> | 2016-05-01 13:56:01 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2016-05-02 22:49:25 +0200 |
| commit | c8aac4fc0dce61a8061bccb8d63a94f1eacd5348 (patch) | |
| tree | c2d566261dd462bba18e6524c578577f5952c838 /src | |
| parent | dc970c4f4e03e17e32132734c1707d845ab610c9 (diff) | |
winsys/amdgpu: pass PIPE_CONFIG to addrlib on texture import
This hasn't been needed, but I think we should set it.
Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/drivers/radeon/r600_texture.c | 1 | ||||
| -rw-r--r-- | src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 1 | ||||
| -rw-r--r-- | src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 1 |
3 files changed, 3 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index 48410785f22..9aca0c2e30a 100644 --- a/src/gallium/drivers/radeon/r600_texture.c +++ b/src/gallium/drivers/radeon/r600_texture.c @@ -1031,6 +1031,7 @@ static struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen rscreen->ws->buffer_get_metadata(buf, &metadata); + surface.pipe_config = metadata.pipe_config; surface.bankw = metadata.bankw; surface.bankh = metadata.bankh; surface.tile_split = metadata.tile_split; diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c index 4ab85ff0721..37a41c03540 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c @@ -408,6 +408,7 @@ static void amdgpu_buffer_get_metadata(struct pb_buffer *_buf, else if (AMDGPU_TILING_GET(tiling_flags, ARRAY_MODE) == 2) /* 1D_TILED_THIN1 */ md->microtile = RADEON_LAYOUT_TILED; + md->pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); md->bankw = 1 << AMDGPU_TILING_GET(tiling_flags, BANK_WIDTH); md->bankh = 1 << AMDGPU_TILING_GET(tiling_flags, BANK_HEIGHT); md->tile_split = eg_tile_split(AMDGPU_TILING_GET(tiling_flags, TILE_SPLIT)); diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c index 0523f111d4e..9da4faf0b8e 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c @@ -360,6 +360,7 @@ static int amdgpu_surface_init(struct radeon_winsys *rws, AddrTileInfoIn.bankHeight = surf->bankh; AddrTileInfoIn.macroAspectRatio = surf->mtilea; AddrTileInfoIn.tileSplitBytes = surf->tile_split; + AddrTileInfoIn.pipeConfig = surf->pipe_config + 1; /* +1 compared to GB_TILE_MODE */ AddrSurfInfoIn.flags.degrade4Space = 0; AddrSurfInfoIn.pTileInfo = &AddrTileInfoIn; |