i965/blorp: Add an "exec" function pointer to blorp_context

Signed-off-by: Jason Ekstrand <[email protected]>
Reviewed-by: Topi Pohjolainen <[email protected]>

8 files changed, 50 insertions, 56 deletions

diff --git a/src/mesa/drivers/dri/i965/blorp.c b/src/mesa/drivers/dri/i965/blorp.c
index 0afbcb3bcca..e655f8dd226 100644
--- a/src/mesa/drivers/dri/i965/blorp.c
+++ b/src/mesa/drivers/dri/i965/blorp.c
@@ -236,31 +236,6 @@ brw_blorp_compile_nir_shader(struct brw_context *brw, struct nir_shader *nir,
 }
 
 void
-brw_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params)
-{
-   switch (brw->gen) {
-   case 6:
-      gen6_blorp_exec(brw, params);
-      break;
-   case 7:
-      if (brw->is_haswell)
-         gen75_blorp_exec(brw, params);
-      else
-         gen7_blorp_exec(brw, params);
-      break;
-   case 8:
-      gen8_blorp_exec(brw, params);
-      break;
-   case 9:
-      gen9_blorp_exec(brw, params);
-      break;
-   default:
-      /* BLORP is not supported before Gen6. */
-      unreachable("not reached");
-   }
-}
-
-void
 blorp_gen6_hiz_op(struct brw_context *brw, struct brw_blorp_surf *surf,
                   unsigned level, unsigned layer, enum gen6_hiz_op op)
 {
@@ -327,5 +302,8 @@ blorp_gen6_hiz_op(struct brw_context *brw, struct brw_blorp_surf *surf,
       unreachable("not reached");
    }
 
-   brw_blorp_exec(brw, &params);
+   struct blorp_batch batch;
+   blorp_batch_init(&brw->blorp, &batch, brw);
+   brw->blorp.exec(&batch, &params);
+   blorp_batch_finish(&batch);
 }
diff --git a/src/mesa/drivers/dri/i965/blorp.h b/src/mesa/drivers/dri/i965/blorp.h
index 83f2b9a7593..45648e3f699 100644
--- a/src/mesa/drivers/dri/i965/blorp.h
+++ b/src/mesa/drivers/dri/i965/blorp.h
@@ -37,6 +37,9 @@ struct brw_wm_prog_key;
 extern "C" {
 #endif
 
+struct blorp_batch;
+struct brw_blorp_params;
+
 struct blorp_context {
    void *driver_ctx;
 
@@ -56,6 +59,8 @@ struct blorp_context {
                          const void *kernel, uint32_t kernel_size,
                          const void *prog_data, uint32_t prog_data_size,
                          uint32_t *kernel_out, void *prog_data_out);
+   void (*exec)(struct blorp_batch *batch,
+                const struct brw_blorp_params *params);
 };
 
 void blorp_init(struct blorp_context *blorp, void *driver_ctx,
diff --git a/src/mesa/drivers/dri/i965/blorp_blit.c b/src/mesa/drivers/dri/i965/blorp_blit.c
index 8f41e4f19cc..d8612524609 100644
--- a/src/mesa/drivers/dri/i965/blorp_blit.c
+++ b/src/mesa/drivers/dri/i965/blorp_blit.c
@@ -1648,5 +1648,8 @@ brw_blorp_blit(struct brw_context *brw,
          swizzle_to_scs(GET_SWZ(src_swizzle, i));
    }
 
-   brw_blorp_exec(brw, &params);
+   struct blorp_batch batch;
+   blorp_batch_init(&brw->blorp, &batch, brw);
+   brw->blorp.exec(&batch, &params);
+   blorp_batch_finish(&batch);
 }
diff --git a/src/mesa/drivers/dri/i965/blorp_clear.c b/src/mesa/drivers/dri/i965/blorp_clear.c
index 5b8ceec5cf0..afb54756385 100644
--- a/src/mesa/drivers/dri/i965/blorp_clear.c
+++ b/src/mesa/drivers/dri/i965/blorp_clear.c
@@ -118,7 +118,10 @@ blorp_fast_clear(struct brw_context *brw, const struct brw_blorp_surf *surf,
    brw_blorp_surface_info_init(brw, &params.dst, surf, level, layer,
                                surf->surf->format, true);
 
-   brw_blorp_exec(brw, &params);
+   struct blorp_batch batch;
+   blorp_batch_init(&brw->blorp, &batch, brw);
+   brw->blorp.exec(&batch, &params);
+   blorp_batch_finish(&batch);
 }
 
 
@@ -164,7 +167,10 @@ blorp_clear(struct brw_context *brw, const struct brw_blorp_surf *surf,
    brw_blorp_surface_info_init(brw, &params.dst, surf, level, layer,
                                format, true);
 
-   brw_blorp_exec(brw, &params);
+   struct blorp_batch batch;
+   blorp_batch_init(&brw->blorp, &batch, brw);
+   brw->blorp.exec(&batch, &params);
+   blorp_batch_finish(&batch);
 }
 
 void
@@ -194,5 +200,8 @@ brw_blorp_ccs_resolve(struct brw_context *brw, struct brw_blorp_surf *surf,
 
    brw_blorp_params_get_clear_kernel(brw, &params, true);
 
-   brw_blorp_exec(brw, &params);
+   struct blorp_batch batch;
+   blorp_batch_init(&brw->blorp, &batch, brw);
+   brw->blorp.exec(&batch, &params);
+   blorp_batch_finish(&batch);
 }
diff --git a/src/mesa/drivers/dri/i965/blorp_priv.h b/src/mesa/drivers/dri/i965/blorp_priv.h
index 8487b3e5635..f6a82a66e7f 100644
--- a/src/mesa/drivers/dri/i965/blorp_priv.h
+++ b/src/mesa/drivers/dri/i965/blorp_priv.h
@@ -183,27 +183,6 @@ struct brw_blorp_params
 void
 brw_blorp_params_init(struct brw_blorp_params *params);
 
-void
-brw_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params);
-
-void
-gen6_blorp_exec(struct brw_context *brw,
-                const struct brw_blorp_params *params);
-
-void
-gen7_blorp_exec(struct brw_context *brw,
-                const struct brw_blorp_params *params);
-
-void
-gen75_blorp_exec(struct brw_context *brw,
-                 const struct brw_blorp_params *params);
-
-void
-gen8_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params);
-
-void
-gen9_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params);
-
 struct brw_blorp_blit_prog_key
 {
    /* Number of samples per pixel that have been configured in the surface
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index 97ca0e3ce8f..d2f24a65ca2 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -71,21 +71,29 @@ brw_blorp_init(struct brw_context *brw)
       brw->blorp.mocs.tex = 0;
       brw->blorp.mocs.rb = 0;
       brw->blorp.mocs.vb = 0;
+      brw->blorp.exec = gen6_blorp_exec;
       break;
    case 7:
       brw->blorp.mocs.tex = GEN7_MOCS_L3;
       brw->blorp.mocs.rb = GEN7_MOCS_L3;
       brw->blorp.mocs.vb = GEN7_MOCS_L3;
+      if (brw->is_haswell) {
+         brw->blorp.exec = gen75_blorp_exec;
+      } else {
+         brw->blorp.exec = gen7_blorp_exec;
+      }
       break;
    case 8:
       brw->blorp.mocs.tex = BDW_MOCS_WB;
       brw->blorp.mocs.rb = BDW_MOCS_PTE;
       brw->blorp.mocs.vb = BDW_MOCS_WB;
+      brw->blorp.exec = gen8_blorp_exec;
       break;
    case 9:
       brw->blorp.mocs.tex = SKL_MOCS_WB;
       brw->blorp.mocs.rb = SKL_MOCS_PTE;
       brw->blorp.mocs.vb = SKL_MOCS_WB;
+      brw->blorp.exec = gen9_blorp_exec;
       break;
    default:
       unreachable("Invalid gen");
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index 94de3075e9c..1aa19520218 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -60,6 +60,17 @@ void
 intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
 	       unsigned int level, unsigned int layer, enum gen6_hiz_op op);
 
+void gen6_blorp_exec(struct blorp_batch *batch,
+                     const struct brw_blorp_params *params);
+void gen7_blorp_exec(struct blorp_batch *batch,
+                     const struct brw_blorp_params *params);
+void gen75_blorp_exec(struct blorp_batch *batch,
+                      const struct brw_blorp_params *params);
+void gen8_blorp_exec(struct blorp_batch *batch,
+                     const struct brw_blorp_params *params);
+void gen9_blorp_exec(struct blorp_batch *batch,
+                     const struct brw_blorp_params *params);
+
 #ifdef __cplusplus
 } /* extern "C" */
 #endif
diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
index 245272956fd..a735f3b2a25 100644
--- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c
+++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
@@ -31,6 +31,8 @@
 
 #include "genX_blorp_exec.h"
 
+#include "brw_blorp.h"
+
 static void *
 blorp_emit_dwords(struct blorp_batch *batch, unsigned n)
 {
@@ -172,9 +174,11 @@ blorp_emit_3dstate_multisample(struct blorp_batch *batch, unsigned samples)
 }
 
 void
-genX(blorp_exec)(struct brw_context *brw,
+genX(blorp_exec)(struct blorp_batch *batch,
                  const struct brw_blorp_params *params)
 {
+   assert(batch->blorp->driver_ctx == batch->driver_batch);
+   struct brw_context *brw = batch->driver_batch;
    struct gl_context *ctx = &brw->ctx;
    const uint32_t estimated_max_batch_usage = GEN_GEN >= 8 ? 1800 : 1500;
    bool check_aperture_failed_once = false;
@@ -213,10 +217,7 @@ retry:
 
    brw_emit_depth_stall_flushes(brw);
 
-   struct blorp_batch batch;
-   blorp_batch_init(&brw->blorp, &batch, brw);
-   blorp_exec(&batch, params);
-   blorp_batch_finish(&batch);
+   blorp_exec(batch, params);
 
    /* Make sure we didn't wrap the batch unintentionally, and make sure we
     * reserved enough space that a wrap will never happen.