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authorMatt Turner <[email protected]>2017-01-10 19:33:22 -0800
committerFrancisco Jerez <[email protected]>2017-04-14 14:56:07 -0700
commit94ffeb7fa2257af3eb416a1e720e08911835665b (patch)
tree7a0ca179234800975785be42bcf2ae183c41e837 /src
parent82d17615f442555b3577be41e24edd341a11d01d (diff)
i965: Use <0,2,1> region for scalar DF sources on IVB/BYT.
On HSW+, scalar DF sources can be accessed using the normal <0,1,0> region, but on IVB and BYT DF regions must be programmed in terms of floats. A <0,2,1> region accomplishes this. v2: - Apply region <0,2,1> in brw_reg_from_fs_reg() (Curro). v3: - Added comment explaining the reason (Curro). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/intel/compiler/brw_fs_generator.cpp13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
index bcb6608d3ae..bc15fd11d96 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -143,6 +143,19 @@ brw_reg_from_fs_reg(const struct gen_device_info *devinfo, fs_inst *inst,
unreachable("not reached");
}
+ /* On HSW+, scalar DF sources can be accessed using the normal <0,1,0>
+ * region, but on IVB and BYT DF regions must be programmed in terms of
+ * floats. A <0,2,1> region accomplishes this.
+ */
+ if (devinfo->gen == 7 && !devinfo->is_haswell &&
+ type_sz(reg->type) == 8 &&
+ brw_reg.vstride == BRW_VERTICAL_STRIDE_0 &&
+ brw_reg.width == BRW_WIDTH_1 &&
+ brw_reg.hstride == BRW_HORIZONTAL_STRIDE_0) {
+ brw_reg.width = BRW_WIDTH_2;
+ brw_reg.hstride = BRW_HORIZONTAL_STRIDE_1;
+ }
+
return brw_reg;
}