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authorMarek Olšák <[email protected]>2015-08-10 02:28:01 +0200
committerMarek Olšák <[email protected]>2015-08-13 01:25:26 +0200
commit8ae88105b60be613126ea07492ffd9712e5e71eb (patch)
treef833fabb6e6b69d79201b9d670ce3e9498cb36b4 /src
parente7a52a5cb810de49a8282cb9f9caea5d554c3348 (diff)
radeonsi: enable VS_OUT_MISC_SIDE_BUS_ENA
This is recommended for better performance. Diag tests always enable this. Reviewed-by: Michel Dänzer <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/radeonsi/si_state.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 701671b8d99..7b452737c86 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -496,6 +496,7 @@ static void si_emit_clip_regs(struct si_context *sctx, struct r600_atom *atom)
info->writes_edgeflag ||
info->writes_layer ||
info->writes_viewport_index) |
+ S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(1) |
(sctx->queued.named.rasterizer->clip_plane_enable &
clipdist_mask));
r600_write_context_reg(cs, R_028810_PA_CL_CLIP_CNTL,