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authorJason Ekstrand <[email protected]>2016-02-18 13:54:15 -0800
committerJason Ekstrand <[email protected]>2016-02-18 13:55:57 -0800
commit698ea542830ba0d56e514492fbdf73e3898d4c17 (patch)
treed4fe8aae2cb52a07252fd005ed8c59dafda960ef /src
parentd5bb23156d698675fff74b1e8207ce0217c148db (diff)
anv/pipeline: Fix a typo in the pipeline layout code
Diffstat (limited to 'src')
-rw-r--r--src/intel/vulkan/anv_nir_apply_pipeline_layout.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
index 4be630bcbe8..e745bf661ee 100644
--- a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
+++ b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
@@ -194,7 +194,7 @@ lower_tex(nir_tex_instr *tex, struct apply_pipeline_layout_state *state)
if (tex->sampler) {
unsigned set = tex->sampler->var->data.descriptor_set;
unsigned binding = tex->sampler->var->data.binding;
- tex->sampler_index = state->set[set].surface_offsets[binding];
+ tex->sampler_index = state->set[set].sampler_offsets[binding];
lower_tex_deref(tex, tex->sampler, &tex->sampler_index,
nir_tex_src_sampler_offset, state);
}