diff options
author | Jason Ekstrand <[email protected]> | 2017-02-28 18:10:53 -0800 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2017-03-01 16:14:02 -0800 |
commit | 5b87c7e0e3e8c23f650b3ad7953465ba131cbfc4 (patch) | |
tree | 4b49061f5647ba49bd593e8b2847bbf536e95c5d /src | |
parent | f85ef1150125d4335c935ed8fb66071690d6fd6d (diff) |
i965: Move SHADER_TIME_STRIDE to brw_compiler.h
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_compiler.h | 8 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.h | 8 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.cpp | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_program.c | 10 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4.cpp | 2 |
5 files changed, 15 insertions, 15 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h b/src/mesa/drivers/dri/i965/brw_compiler.h index d1ff5386823..c048a4dc7af 100644 --- a/src/mesa/drivers/dri/i965/brw_compiler.h +++ b/src/mesa/drivers/dri/i965/brw_compiler.h @@ -374,6 +374,14 @@ struct brw_image_param { */ #define BRW_GEN6_SOL_BINDING_START 0 +/** + * Stride in bytes between shader_time entries. + * + * We separate entries by a cacheline to reduce traffic between EUs writing to + * different entries. + */ +#define BRW_SHADER_TIME_STRIDE 64 + struct brw_stage_prog_data { struct { /** size of our binding table. */ diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 20ebebef117..3845927cd0c 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -390,14 +390,6 @@ struct brw_ff_gs_prog_data { 2 + /* shader time, pull constants */ \ 1 /* cs num work groups */) -/** - * Stride in bytes between shader_time entries. - * - * We separate entries by a cacheline to reduce traffic between EUs writing to - * different entries. - */ -#define SHADER_TIME_STRIDE 64 - struct brw_cache { struct brw_context *brw; diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 68e73cc5cd8..bbeddcaedd1 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -586,7 +586,7 @@ fs_visitor::SHADER_TIME_ADD(const fs_builder &bld, fs_reg value) { int index = shader_time_index * 3 + shader_time_subindex; - struct brw_reg offset = brw_imm_d(index * SHADER_TIME_STRIDE); + struct brw_reg offset = brw_imm_d(index * BRW_SHADER_TIME_STRIDE); fs_reg payload; if (dispatch_width == 8) diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c index dd90a3a481c..8f89849cb49 100644 --- a/src/mesa/drivers/dri/i965/brw_program.c +++ b/src/mesa/drivers/dri/i965/brw_program.c @@ -405,7 +405,7 @@ brw_init_shader_time(struct brw_context *brw) const int max_entries = 2048; brw->shader_time.bo = drm_intel_bo_alloc(brw->bufmgr, "shader time", - max_entries * SHADER_TIME_STRIDE * 3, 4096); + max_entries * BRW_SHADER_TIME_STRIDE * 3, 4096); brw->shader_time.names = rzalloc_array(brw, const char *, max_entries); brw->shader_time.ids = rzalloc_array(brw, int, max_entries); brw->shader_time.types = rzalloc_array(brw, enum shader_time_shader_type, @@ -584,11 +584,11 @@ brw_collect_shader_time(struct brw_context *brw) void *bo_map = brw->shader_time.bo->virtual; for (int i = 0; i < brw->shader_time.num_entries; i++) { - uint32_t *times = bo_map + i * 3 * SHADER_TIME_STRIDE; + uint32_t *times = bo_map + i * 3 * BRW_SHADER_TIME_STRIDE; - brw->shader_time.cumulative[i].time += times[SHADER_TIME_STRIDE * 0 / 4]; - brw->shader_time.cumulative[i].written += times[SHADER_TIME_STRIDE * 1 / 4]; - brw->shader_time.cumulative[i].reset += times[SHADER_TIME_STRIDE * 2 / 4]; + brw->shader_time.cumulative[i].time += times[BRW_SHADER_TIME_STRIDE * 0 / 4]; + brw->shader_time.cumulative[i].written += times[BRW_SHADER_TIME_STRIDE * 1 / 4]; + brw->shader_time.cumulative[i].reset += times[BRW_SHADER_TIME_STRIDE * 2 / 4]; } /* Zero the BO out to clear it out for our next collection. diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 5e60eb657a7..fba040aad62 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -1926,7 +1926,7 @@ vec4_visitor::emit_shader_time_write(int shader_time_subindex, src_reg value) offset.type = BRW_REGISTER_TYPE_UD; int index = shader_time_index * 3 + shader_time_subindex; - emit(MOV(offset, brw_imm_d(index * SHADER_TIME_STRIDE))); + emit(MOV(offset, brw_imm_d(index * BRW_SHADER_TIME_STRIDE))); time.type = BRW_REGISTER_TYPE_UD; emit(MOV(time, value)); |