diff options
author | Jason Ekstrand <[email protected]> | 2014-11-04 10:40:48 -0800 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2015-01-15 07:19:00 -0800 |
commit | fbc443ad564a46e105e0b1d7a12a6f2b07c56b1d (patch) | |
tree | f89c9acb0470f734f143a165176396ab039cd9a0 /src | |
parent | f86902e75d989b781be36ced5dc98dfc0cd34b7b (diff) |
nir: Add an initialization function for SSA definitions
Reviewed-by: Connor Abbott <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/glsl/nir/nir.c | 14 | ||||
-rw-r--r-- | src/glsl/nir/nir.h | 4 | ||||
-rw-r--r-- | src/glsl/nir/nir_to_ssa.c | 28 |
3 files changed, 25 insertions, 21 deletions
diff --git a/src/glsl/nir/nir.c b/src/glsl/nir/nir.c index adb353b909e..5e5f1aca750 100644 --- a/src/glsl/nir/nir.c +++ b/src/glsl/nir/nir.c @@ -1597,6 +1597,20 @@ nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state) return nir_foreach_dest(instr, visit_dest_indirect, &dest_state); } +void +nir_ssa_def_init(nir_function_impl *impl, nir_instr *instr, nir_ssa_def *def, + unsigned num_components, const char *name) +{ + void *mem_ctx = ralloc_parent(instr); + + def->name = name; + def->index = impl->ssa_alloc++; + def->parent_instr = instr; + def->uses = _mesa_set_create(mem_ctx, _mesa_key_pointer_equal); + def->if_uses = _mesa_set_create(mem_ctx, _mesa_key_pointer_equal); + def->num_components = num_components; +} + static bool foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb, bool reverse, void *state); diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h index c48bde81c7b..558ec914044 100644 --- a/src/glsl/nir/nir.h +++ b/src/glsl/nir/nir.h @@ -1278,6 +1278,10 @@ typedef bool (*nir_foreach_src_cb)(nir_src *src, void *state); bool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state); bool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state); +void nir_ssa_def_init(nir_function_impl *impl, nir_instr *instr, + nir_ssa_def *def, unsigned num_components, + const char *name); + /* visits basic blocks in source-code order */ typedef bool (*nir_foreach_block_cb)(nir_block *block, void *state); bool nir_foreach_block(nir_function_impl *impl, nir_foreach_block_cb cb, diff --git a/src/glsl/nir/nir_to_ssa.c b/src/glsl/nir/nir_to_ssa.c index 9f70225f211..26deb355e9c 100644 --- a/src/glsl/nir/nir_to_ssa.c +++ b/src/glsl/nir/nir_to_ssa.c @@ -163,12 +163,9 @@ static nir_ssa_def *get_ssa_src(nir_register *reg, rewrite_state *state) * to preserve the information that this source is undefined */ nir_ssa_undef_instr *instr = nir_ssa_undef_instr_create(state->mem_ctx); - instr->def.index = state->impl->ssa_alloc++; - instr->def.num_components = reg->num_components; - instr->def.uses = _mesa_set_create(state->mem_ctx, - _mesa_key_pointer_equal); - instr->def.if_uses = _mesa_set_create(state->mem_ctx, - _mesa_key_pointer_equal); + nir_ssa_def_init(state->impl, &instr->instr, &instr->def, + reg->num_components, NULL); + /* * We could just insert the undefined instruction before the instruction * we're rewriting, but we could be rewriting a phi source in which case @@ -254,13 +251,8 @@ rewrite_def_forwards(nir_dest *dest, void *_state) name = ralloc_asprintf(state->mem_ctx, "%s_%u", dest->reg.reg->name, state->states[index].num_defs); - dest->ssa.index = state->impl->ssa_alloc++; - dest->ssa.num_components = reg->num_components; - dest->ssa.parent_instr = state->parent_instr; - dest->ssa.uses = _mesa_set_create(state->mem_ctx, _mesa_key_pointer_equal); - dest->ssa.if_uses = _mesa_set_create(state->mem_ctx, - _mesa_key_pointer_equal); - dest->ssa.name = name; + nir_ssa_def_init(state->impl, state->parent_instr, &dest->ssa, + reg->num_components, name); /* push our SSA destination on the stack */ state->states[index].index++; @@ -327,14 +319,8 @@ rewrite_alu_instr_forward(nir_alu_instr *instr, rewrite_state *state) instr->dest.write_mask = (1 << num_components) - 1; instr->dest.dest.is_ssa = true; - instr->dest.dest.ssa.index = state->impl->ssa_alloc++; - instr->dest.dest.ssa.num_components = num_components; - instr->dest.dest.ssa.name = name; - instr->dest.dest.ssa.parent_instr = &instr->instr; - instr->dest.dest.ssa.uses = _mesa_set_create(state->mem_ctx, - _mesa_key_pointer_equal); - instr->dest.dest.ssa.if_uses = _mesa_set_create(state->mem_ctx, - _mesa_key_pointer_equal); + nir_ssa_def_init(state->impl, &instr->instr, &instr->dest.dest.ssa, + num_components, name); if (nir_op_infos[instr->op].output_size == 0) { /* |