diff options
| author | Ilia Mirkin <[email protected]> | 2016-06-02 21:36:04 -0400 |
|---|---|---|
| committer | Ilia Mirkin <[email protected]> | 2016-06-04 23:50:56 -0400 |
| commit | e8ee161b160f6ff18134ff279b046f2e056bccd0 (patch) | |
| tree | 4aa5a8b73e521585dbdaf005686df2b57a37e30f /src | |
| parent | 29abbeecd80bb2cbf48c2c4c13155463d60c70f5 (diff) | |
nvc0: fix memory barrier flag handling
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: "12.0" <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/drivers/nouveau/nvc0/nvc0_context.c | 25 |
1 files changed, 16 insertions, 9 deletions
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.c b/src/gallium/drivers/nouveau/nvc0/nvc0_context.c index 98e787acc27..1137e6ccab0 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.c @@ -90,17 +90,24 @@ nvc0_memory_barrier(struct pipe_context *pipe, unsigned flags) nvc0->cb_dirty = true; } } + } else { + /* Pretty much any writing by shaders needs a serialize after + * it. Especially when moving between 3d and compute pipelines, but even + * without that. + */ + IMMED_NVC0(push, NVC0_3D(SERIALIZE), 0); } - if (flags & (PIPE_BARRIER_SHADER_BUFFER | - PIPE_BARRIER_CONSTANT_BUFFER | - PIPE_BARRIER_INDEX_BUFFER | - PIPE_BARRIER_IMAGE | - PIPE_BARRIER_TEXTURE | - PIPE_BARRIER_VERTEX_BUFFER | - PIPE_BARRIER_STREAMOUT_BUFFER)) { - IMMED_NVC0(push, NVC0_3D(MEM_BARRIER), 0x1011); - } + /* If we're going to texture from a buffer/image written by a shader, we + * must flush the texture cache. + */ + if (flags & PIPE_BARRIER_TEXTURE) + IMMED_NVC0(push, NVC0_3D(TEX_CACHE_CTL), 0); + + if (flags & PIPE_BARRIER_CONSTANT_BUFFER) + nvc0->cb_dirty = true; + if (flags & (PIPE_BARRIER_VERTEX_BUFFER | PIPE_BARRIER_INDEX_BUFFER)) + nvc0->base.vbo_dirty = true; } static void |