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authorMatt Turner <[email protected]>2015-10-20 18:31:02 -0700
committerMatt Turner <[email protected]>2015-10-22 12:27:00 -0700
commite2707c8765b15b7ac666067160307c7f9d2d8b4d (patch)
treed3e2833c8f81930ebf89f64a018e6f19a8c60733 /src
parent0f74796e33cb15ec0c79bc2b5d0c766dc5068b41 (diff)
i965/fs: Emit a single ADD instruction for SET_SAMPLE_ID on Gen8+.
Gen8+ lifted the register region restriction that an instruction whose destination spans two registers must have sources that also span two registers. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_generator.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index cee7c68bba7..139d1dd17ec 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -1505,7 +1505,7 @@ fs_generator::generate_set_sample_id(fs_inst *inst,
src0.type == BRW_REGISTER_TYPE_UD);
struct brw_reg reg = stride(src1, 1, 4, 0);
- if (dispatch_width == 8) {
+ if (devinfo->gen >= 8 || dispatch_width == 8) {
brw_ADD(p, dst, src0, reg);
} else if (dispatch_width == 16) {
brw_push_insn_state(p);