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authorMarek Olšák <marek.olsak@amd.com>2013-09-21 20:14:52 +0200
committerMarek Olšák <marek.olsak@amd.com>2013-09-29 15:18:08 +0200
commitbfea9c498d41771134a4078d7acce6ca4f0c663d (patch)
tree9ab5ea51bba975a3caa079401545f3c032f964e1 /src
parent4ea2e5a4e7467def0f2eacb5ab5a73bd8bfaa183 (diff)
r600g,radeonsi: consolidate r600_texture structures
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/r600/r600_resource.h24
-rw-r--r--src/gallium/drivers/radeon/r600_pipe_common.h25
-rw-r--r--src/gallium/drivers/radeonsi/r600_resource.h19
3 files changed, 26 insertions, 42 deletions
diff --git a/src/gallium/drivers/r600/r600_resource.h b/src/gallium/drivers/r600/r600_resource.h
index 0c569b3a74e..a3ccdb0c638 100644
--- a/src/gallium/drivers/r600/r600_resource.h
+++ b/src/gallium/drivers/r600/r600_resource.h
@@ -34,30 +34,6 @@ struct r600_resource_global {
struct compute_memory_item *chunk;
};
-struct r600_texture {
- struct r600_resource resource;
-
- unsigned pitch_override;
- unsigned size;
- bool non_disp_tiling;
- bool is_depth;
- unsigned dirty_level_mask; /* each bit says if that mipmap is compressed */
- struct r600_texture *flushed_depth_texture;
- boolean is_flushing_texture;
- struct radeon_surface surface;
-
- /* Colorbuffer compression and fast clear. */
- struct r600_fmask_info fmask;
- struct r600_cmask_info cmask;
-
- struct r600_resource *htile;
- /* use htile only for first level */
- float depth_clear;
-
- struct r600_resource *cmask_buffer;
- unsigned color_clear_value[2];
-};
-
struct r600_surface {
struct pipe_surface base;
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index 0bd696a8818..63439655fd2 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -105,6 +105,31 @@ struct r600_cmask_info {
unsigned slice_tile_max;
};
+struct r600_texture {
+ struct r600_resource resource;
+
+ unsigned size;
+ unsigned pitch_override;
+ bool is_depth;
+ unsigned dirty_level_mask; /* each bit says if that mipmap is compressed */
+ struct r600_texture *flushed_depth_texture;
+ boolean is_flushing_texture;
+ struct radeon_surface surface;
+
+ /* Colorbuffer compression and fast clear. */
+ struct r600_fmask_info fmask;
+ struct r600_cmask_info cmask;
+
+ struct r600_resource *htile;
+ float depth_clear; /* use htile only for first level */
+
+ struct r600_resource *cmask_buffer;
+ unsigned color_clear_value[2];
+
+ bool non_disp_tiling; /* R600-Cayman only */
+ unsigned mipmap_shift;
+};
+
struct r600_common_screen {
struct pipe_screen b;
struct radeon_winsys *ws;
diff --git a/src/gallium/drivers/radeonsi/r600_resource.h b/src/gallium/drivers/radeonsi/r600_resource.h
index ab9ddbe010a..116287ccc33 100644
--- a/src/gallium/drivers/radeonsi/r600_resource.h
+++ b/src/gallium/drivers/radeonsi/r600_resource.h
@@ -23,24 +23,7 @@
#ifndef R600_RESOURCE_H
#define R600_RESOURCE_H
-#include "util/u_transfer.h"
-
-struct r600_texture {
- struct r600_resource resource;
-
- unsigned size;
- unsigned pitch_override;
- unsigned is_depth;
- unsigned dirty_level_mask; /* each bit says if that miplevel is dirty */
- struct r600_texture *flushed_depth_texture;
- boolean is_flushing_texture;
- struct radeon_surface surface;
- unsigned mipmap_shift;
-
- /* Colorbuffer compression and fast clear. */
- struct r600_fmask_info fmask;
- struct r600_cmask_info cmask;
-};
+#include "../radeon/r600_pipe_common.h"
struct r600_surface {
struct pipe_surface base;