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authorFrans Gu <frans.gu@amd.com>2015-08-14 06:03:24 -0400
committerMarek Olšák <marek.olsak@amd.com>2017-03-30 14:44:33 +0200
commitacaeae286196aaa1d704862d40a817fec27b6005 (patch)
tree73078576daaa67fcc54cfc420323757d0a11558a /src
parent90029b958e7ad583d190c56af067950a3e881d64 (diff)
amdgpu/addrlib: Add a new tile mode ADDR_TM_UNKNOWN
This can be used by address lib client to ask address lib to select tile mode.
Diffstat (limited to 'src')
-rw-r--r--src/amd/addrlib/addrinterface.h3
-rw-r--r--src/amd/addrlib/addrtypes.h3
-rw-r--r--src/amd/addrlib/core/addrlib1.cpp32
-rw-r--r--src/amd/addrlib/core/addrlib1.h11
-rw-r--r--src/amd/addrlib/r800/ciaddrlib.cpp96
-rw-r--r--src/amd/addrlib/r800/ciaddrlib.h2
-rw-r--r--src/amd/addrlib/r800/siaddrlib.cpp76
-rw-r--r--src/amd/addrlib/r800/siaddrlib.h2
8 files changed, 211 insertions, 14 deletions
diff --git a/src/amd/addrlib/addrinterface.h b/src/amd/addrlib/addrinterface.h
index 3604fb11ce5..fef8d495701 100644
--- a/src/amd/addrlib/addrinterface.h
+++ b/src/amd/addrlib/addrinterface.h
@@ -514,7 +514,8 @@ typedef union _ADDR_SURFACE_FLAGS
/// mode to PRT_* tile mode to disable slice rotation,
/// which is needed by swizzle pattern equation.
UINT_32 skipIndicesOutput : 1; ///< Skipping indices in output.
- UINT_32 reserved : 7; ///< Reserved bits
+ UINT_32 rotateDisplay : 1; ///< Rotate micro tile type
+ UINT_32 reserved : 6; ///< Reserved bits
};
UINT_32 value;
diff --git a/src/amd/addrlib/addrtypes.h b/src/amd/addrlib/addrtypes.h
index fb8e706c759..681bb24aaf5 100644
--- a/src/amd/addrlib/addrtypes.h
+++ b/src/amd/addrlib/addrtypes.h
@@ -195,7 +195,8 @@ typedef enum _AddrTileMode
ADDR_TM_PRT_TILED_THICK = 22, ///< No bank/pipe rotation or hashing beyond macrotile size
ADDR_TM_PRT_2D_TILED_THICK = 23, ///< Same as 2D_TILED_THICK, PRT only
ADDR_TM_PRT_3D_TILED_THICK = 24, ///< Same as 3D_TILED_THICK, PRT only
- ADDR_TM_COUNT = 25, ///< Must be the value of the last tile mode
+ ADDR_TM_UNKNOWN = 25, ///< Unkown tile mode, should be decided by address lib
+ ADDR_TM_COUNT = 26, ///< Must be the value of the last tile mode
} AddrTileMode;
/**
diff --git a/src/amd/addrlib/core/addrlib1.cpp b/src/amd/addrlib/core/addrlib1.cpp
index 5e68f27f418..e4570cc7c87 100644
--- a/src/amd/addrlib/core/addrlib1.cpp
+++ b/src/amd/addrlib/core/addrlib1.cpp
@@ -67,6 +67,7 @@ const AddrTileModeFlags AddrLib1::ModeFlags[ADDR_TM_COUNT] =
{4, 0, 0, 1, 0, 1, 1, 0}, // ADDR_TM_PRT_TILED_THICK
{4, 0, 0, 1, 0, 1, 0, 0}, // ADDR_TM_PRT_2D_TILED_THICK
{4, 0, 0, 1, 1, 1, 0, 0}, // ADDR_TM_PRT_3D_TILED_THICK
+ {0, 0, 0, 0, 0, 0, 0, 0}, // ADDR_TM_UNKNOWN
};
///////////////////////////////////////////////////////////////////////////////////////////////////
@@ -179,8 +180,13 @@ ADDR_E_RETURNCODE AddrLib1::ComputeSurfaceInfo(
returnCode = ADDR_INVALIDPARAMS;
}
+ if ((pIn->tileMode == ADDR_TM_UNKNOWN) && (pIn->mipLevel > 0))
+ {
+ returnCode = ADDR_INVALIDPARAMS;
+ }
+
// Thick modes don't support multisample
- if (Thickness(pIn->tileMode) > 1 && pIn->numSamples > 1)
+ if ((Thickness(pIn->tileMode) > 1) && (pIn->numSamples > 1))
{
returnCode = ADDR_INVALIDPARAMS;
}
@@ -202,7 +208,7 @@ ADDR_E_RETURNCODE AddrLib1::ComputeSurfaceInfo(
localIn.pTileInfo = &tileInfoNull;
}
- localIn.numSamples = pIn->numSamples == 0 ? 1 : pIn->numSamples;
+ localIn.numSamples = (pIn->numSamples == 0) ? 1 : pIn->numSamples;
// Do mipmap check first
// If format is BCn, pre-pad dimension to power-of-two according to HWL
@@ -324,15 +330,23 @@ ADDR_E_RETURNCODE AddrLib1::ComputeSurfaceInfo(
if (returnCode == ADDR_OK)
{
- // HWL layer may override tile mode if necessary
- HwlOverrideTileMode(&localIn);
+ if (localIn.tileMode == ADDR_TM_UNKNOWN)
+ {
+ // HWL layer may override tile mode if necessary
+ HwlSelectTileMode(&localIn);
+ }
+ else
+ {
+ // HWL layer may override tile mode if necessary
+ HwlOverrideTileMode(&localIn);
- AddrTileMode tileMode = localIn.tileMode;
+ AddrTileMode tileMode = localIn.tileMode;
- // Optimize tile mode if possible
- if (OptimizeTileMode(&localIn, &tileMode))
- {
- localIn.tileMode = tileMode;
+ // Optimize tile mode if possible
+ if (OptimizeTileMode(&localIn, &tileMode))
+ {
+ localIn.tileMode = tileMode;
+ }
}
}
diff --git a/src/amd/addrlib/core/addrlib1.h b/src/amd/addrlib/core/addrlib1.h
index 6ca58260cc8..99e8a9aed1f 100644
--- a/src/amd/addrlib/core/addrlib1.h
+++ b/src/amd/addrlib/core/addrlib1.h
@@ -351,6 +351,11 @@ protected:
// not supported in hwl layer
}
+ virtual VOID HwlSelectTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const
+ {
+ // not supported in hwl layer
+ }
+
AddrTileMode DegradeLargeThickTile(AddrTileMode tileMode, UINT_32 bpp) const;
VOID PadDimensions(
@@ -485,6 +490,9 @@ protected:
virtual UINT_32 HwlComputeQbStereoRightSwizzle(
ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0;
+ BOOL_32 OptimizeTileMode(
+ const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, AddrTileMode* pTileMode) const;
+
private:
// Disallow the copy constructor
AddrLib1(const AddrLib1& a);
@@ -507,9 +515,6 @@ private:
UINT_32 ComputeXmaskCoordYFromPipe(
UINT_32 pipe, UINT_32 x) const;
-
- BOOL_32 OptimizeTileMode(
- const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, AddrTileMode* pTileMode) const;
};
#endif
diff --git a/src/amd/addrlib/r800/ciaddrlib.cpp b/src/amd/addrlib/r800/ciaddrlib.cpp
index f88741e84d1..15aff1652a4 100644
--- a/src/amd/addrlib/r800/ciaddrlib.cpp
+++ b/src/amd/addrlib/r800/ciaddrlib.cpp
@@ -1024,6 +1024,102 @@ VOID CiAddrLib::HwlOverrideTileMode(
/**
***************************************************************************************************
+* CiAddrLib::HwlSelectTileMode
+*
+* @brief
+* Select tile modes.
+*
+* @return
+* N/A
+*
+***************************************************************************************************
+*/
+VOID CiAddrLib::HwlSelectTileMode(
+ ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut ///< [in/out] input output structure
+ ) const
+{
+ AddrTileMode tileMode;
+ AddrTileType tileType;
+
+ if (pInOut->flags.rotateDisplay)
+ {
+ tileMode = ADDR_TM_2D_TILED_THIN1;
+ tileType = ADDR_ROTATED;
+ }
+ else if (pInOut->flags.volume)
+ {
+ BOOL_32 bThin = (m_settings.isBonaire == TRUE) ||
+ ((m_allowNonDispThickModes == TRUE) && (pInOut->flags.color == TRUE));
+
+ if (pInOut->numSlices >= 8)
+ {
+ tileMode = ADDR_TM_2D_TILED_XTHICK;
+ tileType = (bThin == TRUE) ? ADDR_NON_DISPLAYABLE : ADDR_THICK;
+ }
+ else if (pInOut->numSlices >= 4)
+ {
+ tileMode = ADDR_TM_2D_TILED_THICK;
+ tileType = (bThin == TRUE) ? ADDR_NON_DISPLAYABLE : ADDR_THICK;
+ }
+ else
+ {
+ tileMode = ADDR_TM_2D_TILED_THIN1;
+ tileType = ADDR_NON_DISPLAYABLE;
+ }
+ }
+ else
+ {
+ tileMode = ADDR_TM_2D_TILED_THIN1;
+
+ if (pInOut->flags.depth || pInOut->flags.stencil)
+ {
+ tileType = ADDR_DEPTH_SAMPLE_ORDER;
+ }
+ else if ((pInOut->bpp <= 32) ||
+ (pInOut->flags.display == TRUE) ||
+ (pInOut->flags.overlay == TRUE))
+ {
+ tileType = ADDR_DISPLAYABLE;
+ }
+ else
+ {
+ tileType = ADDR_NON_DISPLAYABLE;
+ }
+ }
+
+ if (pInOut->flags.prt)
+ {
+ if (Thickness(tileMode) > 1)
+ {
+ tileMode = ADDR_TM_PRT_TILED_THICK;
+ tileType = (m_settings.isBonaire == TRUE) ? ADDR_NON_DISPLAYABLE : ADDR_THICK;
+ }
+ else
+ {
+ tileMode = ADDR_TM_PRT_TILED_THIN1;
+ }
+ }
+
+ pInOut->tileMode = tileMode;
+ pInOut->tileType = tileType;
+
+ if ((pInOut->flags.dccCompatible == FALSE) &&
+ (pInOut->flags.tcCompatible == FALSE))
+ {
+ pInOut->flags.opt4Space = TRUE;
+
+ // Optimize tile mode if possible
+ if (OptimizeTileMode(pInOut, &tileMode))
+ {
+ pInOut->tileMode = tileMode;
+ }
+ }
+
+ HwlOverrideTileMode(pInOut);
+}
+
+/**
+***************************************************************************************************
* CiAddrLib::HwlSetupTileInfo
*
* @brief
diff --git a/src/amd/addrlib/r800/ciaddrlib.h b/src/amd/addrlib/r800/ciaddrlib.h
index e959df39231..12587cd06c5 100644
--- a/src/amd/addrlib/r800/ciaddrlib.h
+++ b/src/amd/addrlib/r800/ciaddrlib.h
@@ -143,6 +143,8 @@ protected:
virtual VOID HwlOverrideTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const;
+ virtual VOID HwlSelectTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const;
+
virtual ADDR_E_RETURNCODE HwlComputeDccInfo(
const ADDR_COMPUTE_DCCINFO_INPUT* pIn,
ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const;
diff --git a/src/amd/addrlib/r800/siaddrlib.cpp b/src/amd/addrlib/r800/siaddrlib.cpp
index 4822d77a4c2..30f99349a1b 100644
--- a/src/amd/addrlib/r800/siaddrlib.cpp
+++ b/src/amd/addrlib/r800/siaddrlib.cpp
@@ -3199,6 +3199,82 @@ void SiAddrLib::HwlOverrideTileMode(
/**
***************************************************************************************************
+* SiAddrLib::HwlSelectTileMode
+*
+* @brief
+* Select tile modes.
+*
+* @return
+* N/A
+*
+***************************************************************************************************
+*/
+VOID SiAddrLib::HwlSelectTileMode(
+ ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut ///< [in/out] input output structure
+ ) const
+{
+ AddrTileMode tileMode;
+ AddrTileType tileType;
+
+ if (pInOut->flags.volume)
+ {
+ if (pInOut->numSlices >= 8)
+ {
+ tileMode = ADDR_TM_2D_TILED_XTHICK;
+ }
+ else if (pInOut->numSlices >= 4)
+ {
+ tileMode = ADDR_TM_2D_TILED_THICK;
+ }
+ else
+ {
+ tileMode = ADDR_TM_2D_TILED_THIN1;
+ }
+ tileType = ADDR_NON_DISPLAYABLE;
+ }
+ else
+ {
+ tileMode = ADDR_TM_2D_TILED_THIN1;
+
+ if (pInOut->flags.depth || pInOut->flags.stencil)
+ {
+ tileType = ADDR_DEPTH_SAMPLE_ORDER;
+ }
+ else if ((pInOut->bpp <= 32) ||
+ (pInOut->flags.display == TRUE) ||
+ (pInOut->flags.overlay == TRUE))
+ {
+ tileType = ADDR_DISPLAYABLE;
+ }
+ else
+ {
+ tileType = ADDR_NON_DISPLAYABLE;
+ }
+ }
+
+ if (pInOut->flags.prt)
+ {
+ tileMode = ADDR_TM_2D_TILED_THIN1;
+ tileType = (tileType == ADDR_DISPLAYABLE) ? ADDR_NON_DISPLAYABLE : tileType;
+ }
+
+ pInOut->tileMode = tileMode;
+ pInOut->tileType = tileType;
+
+ // Optimize tile mode if possible
+ pInOut->flags.opt4Space = TRUE;
+
+ // Optimize tile mode if possible
+ if (OptimizeTileMode(pInOut, &tileMode))
+ {
+ pInOut->tileMode = tileMode;
+ }
+
+ HwlOverrideTileMode(pInOut);
+}
+
+/**
+***************************************************************************************************
* SiAddrLib::HwlGetMaxAlignments
*
* @brief
diff --git a/src/amd/addrlib/r800/siaddrlib.h b/src/amd/addrlib/r800/siaddrlib.h
index 814cd0095db..7619cfec3ee 100644
--- a/src/amd/addrlib/r800/siaddrlib.h
+++ b/src/amd/addrlib/r800/siaddrlib.h
@@ -183,6 +183,8 @@ protected:
virtual VOID HwlOverrideTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const;
+ virtual VOID HwlSelectTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const;
+
virtual BOOL_32 HwlSanityCheckMacroTiled(
ADDR_TILEINFO* pTileInfo) const
{