i965/gen6: Remove dead code in hiz surface setup

In intel_hiz_miptree_buf_create() the miptree is unconditionally
created with MIPTREE_LAYOUT_FORCE_ALL_SLICE_AT_LOD.

Reviewed-by: Nanley Chery <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Signed-off-by: Topi Pohjolainen <[email protected]>

1 files changed, 6 insertions, 7 deletions

diff --git a/src/mesa/drivers/dri/i965/gen6_depth_state.c b/src/mesa/drivers/dri/i965/gen6_depth_state.c
index 20992d53290..dcee1f9b61e 100644
--- a/src/mesa/drivers/dri/i965/gen6_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_depth_state.c
@@ -162,14 +162,13 @@ gen6_emit_depth_stencil_hiz(struct brw_context *brw,
       if (hiz) {
          assert(depth_mt);
          struct intel_mipmap_tree *hiz_mt = depth_mt->hiz_buf->mt;
-         uint32_t offset = 0;
 
-         if (hiz_mt->array_layout == GEN6_HIZ_STENCIL) {
-            offset = intel_miptree_get_aligned_offset(
-                        hiz_mt,
-                        hiz_mt->level[lod].level_x,
-                        hiz_mt->level[lod].level_y);
-         }
+         assert(hiz_mt->array_layout == GEN6_HIZ_STENCIL);
+
+         const uint32_t offset = intel_miptree_get_aligned_offset(
+                                    hiz_mt,
+                                    hiz_mt->level[lod].level_x,
+                                    hiz_mt->level[lod].level_y);
 
 	 BEGIN_BATCH(3);
 	 OUT_BATCH((_3DSTATE_HIER_DEPTH_BUFFER << 16) | (3 - 2));