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authorTimothy Arceri <[email protected]>2016-05-19 15:58:51 +1000
committerTimothy Arceri <[email protected]>2016-07-07 10:26:43 +1000
commita102ef2d4fd01a946f949a45115d65abb6714a5b (patch)
treecb5871a782b3e41c2eccb7360682dc088fe077b3 /src
parent448adfbc67f4f6d0268a2f94dac311a26dc19864 (diff)
i965: add component packing support for gs
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.h2
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_nir.cpp22
2 files changed, 19 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 4237197d8d2..1f88f8fd026 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -265,7 +265,7 @@ public:
void emit_gs_thread_end();
void emit_gs_input_load(const fs_reg &dst, const nir_src &vertex_src,
unsigned base_offset, const nir_src &offset_src,
- unsigned num_components);
+ unsigned num_components, unsigned first_component);
void emit_cs_terminate();
fs_reg *emit_cs_work_group_id_setup();
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index b3f5dfd5843..eac4ec1e756 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -1997,7 +1997,8 @@ fs_visitor::emit_gs_input_load(const fs_reg &dst,
const nir_src &vertex_src,
unsigned base_offset,
const nir_src &offset_src,
- unsigned num_components)
+ unsigned num_components,
+ unsigned first_component)
{
struct brw_gs_prog_data *gs_prog_data = (struct brw_gs_prog_data *) prog_data;
@@ -2131,10 +2132,22 @@ fs_visitor::emit_gs_input_load(const fs_reg &dst,
for (unsigned iter = 0; iter < num_iterations; iter++) {
if (offset_const) {
/* Constant indexing - use global offset. */
- inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8, tmp_dst, icp_handle);
+ if (first_component != 0) {
+ unsigned read_components = num_components + first_component;
+ fs_reg tmp = bld.vgrf(dst.type, read_components);
+ inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8, tmp, icp_handle);
+ inst->regs_written = read_components;
+ for (unsigned i = 0; i < num_components; i++) {
+ bld.MOV(offset(tmp_dst, bld, i),
+ offset(tmp, bld, i + first_component));
+ }
+ } else {
+ inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8, tmp_dst,
+ icp_handle);
+ inst->regs_written = num_components * type_sz(tmp_dst.type) / 4;
+ }
inst->offset = base_offset + offset_const->u32[0];
inst->mlen = 1;
- inst->regs_written = num_components * type_sz(tmp_dst.type) / 4;
} else {
/* Indirect indexing - use per-slot offsets as well. */
const fs_reg srcs[] = { icp_handle, indirect_offset };
@@ -2896,7 +2909,8 @@ fs_visitor::nir_emit_gs_intrinsic(const fs_builder &bld,
case nir_intrinsic_load_per_vertex_input:
emit_gs_input_load(dest, instr->src[0], instr->const_index[0],
- instr->src[1], instr->num_components);
+ instr->src[1], instr->num_components,
+ nir_intrinsic_component(instr));
break;
case nir_intrinsic_emit_vertex_with_counter: