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authorMarek Olšák <[email protected]>2015-05-18 02:23:04 +0200
committerMarek Olšák <[email protected]>2015-05-26 11:46:28 +0200
commit3d35027fdc383c2bd009f3690b2b160e3b39d58b (patch)
tree75f7a1532ca859bad4b2bc697f64646bbdd8cf2c /src
parentc1266f28d6af7788e19634f0d36257e78d1139be (diff)
tgsi/ureg: enable creating tessellation shaders with ureg_create_shader
Reviewed-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_ureg.c18
1 files changed, 14 insertions, 4 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.c b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
index 7a8bf5404e3..037d31a1643 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_ureg.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
@@ -1667,10 +1667,20 @@ void *ureg_create_shader( struct ureg_program *ureg,
else
memset(&state.stream_output, 0, sizeof(state.stream_output));
- if (ureg->processor == TGSI_PROCESSOR_VERTEX)
- return pipe->create_vs_state( pipe, &state );
- else
- return pipe->create_fs_state( pipe, &state );
+ switch (ureg->processor) {
+ case TGSI_PROCESSOR_VERTEX:
+ return pipe->create_vs_state(pipe, &state);
+ case TGSI_PROCESSOR_TESS_CTRL:
+ return pipe->create_tcs_state(pipe, &state);
+ case TGSI_PROCESSOR_TESS_EVAL:
+ return pipe->create_tes_state(pipe, &state);
+ case TGSI_PROCESSOR_GEOMETRY:
+ return pipe->create_gs_state(pipe, &state);
+ case TGSI_PROCESSOR_FRAGMENT:
+ return pipe->create_fs_state(pipe, &state);
+ default:
+ return NULL;
+ }
}