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authorGeorge Kyriazis <[email protected]>2018-02-14 01:13:13 -0600
committerGeorge Kyriazis <[email protected]>2018-02-28 11:42:41 -0600
commit1c73f42e6e55de0be21221979882f6e42b3c2747 (patch)
treebcfc5ca41a2a482850cb5c1d54b5be029e347c6a /src
parente2a4fd076167fed786edc9e7acb45b68429c3399 (diff)
swr/rast: Consolidate TRANSLATE_ADDRESS
Translate is now part of an overloaded LOAD call which required a change to the code gen to skip the load functions in order to handle them manually to make them virtual. Reviewed-By: Bruce Cherniak <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_ir_macros.py3
-rw-r--r--src/gallium/drivers/swr/rasterizer/jitter/builder_mem.cpp20
-rw-r--r--src/gallium/drivers/swr/rasterizer/jitter/builder_mem.h7
-rw-r--r--src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp4
4 files changed, 28 insertions, 6 deletions
diff --git a/src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_ir_macros.py b/src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_ir_macros.py
index 3b19cb4e80b..aab499b54ad 100644
--- a/src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_ir_macros.py
+++ b/src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_ir_macros.py
@@ -152,7 +152,8 @@ def parse_ir_builder(input_file):
# The following functions need to be ignored.
if (func_name == 'CreateInsertNUWNSWBinOp' or
func_name == 'CreateMaskedIntrinsic' or
- func_name == 'CreateAlignmentAssumptionHelper'):
+ func_name == 'CreateAlignmentAssumptionHelper' or
+ func_name == 'CreateLoad'):
ignore = True
# Convert CamelCase to CAMEL_CASE
diff --git a/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.cpp b/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.cpp
index 3bba6ff04f3..67e415cdcc7 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.cpp
+++ b/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.cpp
@@ -69,6 +69,26 @@ namespace SwrJit
return IN_BOUNDS_GEP(ptr, indices);
}
+ LoadInst* Builder::LOAD(Value *Ptr, const char *Name)
+ {
+ return IRB()->CreateLoad(Ptr, Name);
+ }
+
+ LoadInst* Builder::LOAD(Value *Ptr, const Twine &Name)
+ {
+ return IRB()->CreateLoad(Ptr, Name);
+ }
+
+ LoadInst* Builder::LOAD(Type *Ty, Value *Ptr, const Twine &Name)
+ {
+ return IRB()->CreateLoad(Ty, Ptr, Name);
+ }
+
+ LoadInst* Builder::LOAD(Value *Ptr, bool isVolatile, const Twine &Name)
+ {
+ return IRB()->CreateLoad(Ptr, isVolatile, Name);
+ }
+
LoadInst *Builder::LOAD(Value *basePtr, const std::initializer_list<uint32_t> &indices, const llvm::Twine& name)
{
std::vector<Value*> valIndices;
diff --git a/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.h b/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.h
index 4f496343e96..b3a0e2b09fe 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.h
+++ b/src/gallium/drivers/swr/rasterizer/jitter/builder_mem.h
@@ -34,7 +34,12 @@ Value *GEP(Value* ptr, const std::initializer_list<uint32_t> &indexList);
Value *IN_BOUNDS_GEP(Value* ptr, const std::initializer_list<Value*> &indexList);
Value *IN_BOUNDS_GEP(Value* ptr, const std::initializer_list<uint32_t> &indexList);
-LoadInst *LOAD(Value *BasePtr, const std::initializer_list<uint32_t> &offset, const llvm::Twine& name = "");
+virtual LoadInst* LOAD(Value *Ptr, const char *Name);
+virtual LoadInst* LOAD(Value *Ptr, const Twine &Name = "");
+virtual LoadInst* LOAD(Type *Ty, Value *Ptr, const Twine &Name = "");
+virtual LoadInst* LOAD(Value *Ptr, bool isVolatile, const Twine &Name = "");
+virtual LoadInst* LOAD(Value *BasePtr, const std::initializer_list<uint32_t> &offset, const llvm::Twine& Name = "");
+
LoadInst *LOADV(Value *BasePtr, const std::initializer_list<Value*> &offset, const llvm::Twine& name = "");
StoreInst *STORE(Value *Val, Value *BasePtr, const std::initializer_list<uint32_t> &offset);
StoreInst *STOREV(Value *Val, Value *BasePtr, const std::initializer_list<Value*> &offset);
diff --git a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
index 68bd4c16878..f1dc00293af 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
+++ b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp
@@ -1830,16 +1830,12 @@ Value* FetchJit::GetSimdValid16bitIndices(Value* pIndices, Value* pLastIndex)
Value* pZeroIndex = ALLOCA(mInt16Ty);
STORE(C((uint16_t)0), pZeroIndex);
- pLastIndex = TRANSLATE_ADDRESS(pLastIndex);
-
// Load a SIMD of index pointers
for(int64_t lane = 0; lane < mVWidth; lane++)
{
// Calculate the address of the requested index
Value *pIndex = GEP(pIndices, C(lane));
- pIndex = TRANSLATE_ADDRESS(pIndex);
-
// check if the address is less than the max index,
Value* mask = ICMP_ULT(pIndex, pLastIndex);