r300-gallium: r300 passthrough shader, static shader objects, and clear code.

5 files changed, 89 insertions, 112 deletions

diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c
index 634a72991ce..8391663f7f6 100644
--- a/src/gallium/drivers/r300/r300_emit.c
+++ b/src/gallium/drivers/r300/r300_emit.c
@@ -115,23 +115,32 @@ void r500_emit_fragment_shader(struct r300_context* r300,
 {
     CS_LOCALS(r300);
     int i;
-
-    BEGIN_CS(8 + (fs->instruction_count * 6) + 6);
+    /* XXX Problem: OUT_CS_ONE_REG causes card crash */
+    /* BEGIN_CS(8 + (shader->shader.instruction_count * 6) + 6); */
+    BEGIN_CS(10 + (shader->shader.instruction_count * 12));
     OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO);
     OUT_CS_REG(R500_US_PIXSIZE, fs->shader.stack_size);
     OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) |
         R500_US_CODE_END_ADDR(fs->instruction_count));
 
     OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_INSTR);
-    OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA,
-        fs->instruction_count * 6);
-    for (i = 0; i < fs->instruction_count; i++) {
-        OUT_CS(fs->instructions[i].inst0);
-        OUT_CS(fs->instructions[i].inst1);
-        OUT_CS(fs->instructions[i].inst2);
-        OUT_CS(fs->instructions[i].inst3);
-        OUT_CS(fs->instructions[i].inst4);
-        OUT_CS(fs->instructions[i].inst5);
+    /* OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA,
+        shader->shader.instruction_count * 6);
+    for (i = 0; i < shader->shader.instruction_count; i++) {
+        OUT_CS(shader->instructions[i].inst0);
+        OUT_CS(shader->instructions[i].inst1);
+        OUT_CS(shader->instructions[i].inst2);
+        OUT_CS(shader->instructions[i].inst3);
+        OUT_CS(shader->instructions[i].inst4);
+        OUT_CS(shader->instructions[i].inst5);
+    } */
+    for (i = 0; i < shader->shader.instruction_count; i++) {
+        OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst0);
+        OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst1);
+        OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst2);
+        OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst3);
+        OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst4);
+        OUT_CS_REG(R500_GA_US_VECTOR_DATA, shader->instructions[i].inst5);
     }
     R300_PACIFY;
     END_CS;
diff --git a/src/gallium/drivers/r300/r300_state_shader.c b/src/gallium/drivers/r300/r300_state_shader.c
index 824dbeb0aa2..352cb62df74 100644
--- a/src/gallium/drivers/r300/r300_state_shader.c
+++ b/src/gallium/drivers/r300/r300_state_shader.c
@@ -22,59 +22,16 @@
 
 #include "r300_state_shader.h"
 
-void r300_make_passthrough_fragment_shader(struct r300_fragment_shader* fs)
-{
-    fs->alu_instruction_count = 1;
-    fs->tex_instruction_count = 0;
-    fs->indirections = 1;
-    fs->shader.stack_size = 2;
-
-    /* XXX decode these */
-    fs->instructions[0].alu_rgb_inst = 0x50A80;
-    fs->instructions[0].alu_rgb_inst = 0x1C000000;
-    fs->instructions[0].alu_alpha_inst = 0x40889;
-    fs->instructions[0].alu_alpha_inst = 0x1000000;
-}
-
-void r500_make_passthrough_fragment_shader(struct r500_fragment_shader* fs)
-{
-    fs->instruction_count = 1;
-    fs->shader.stack_size = 0;
-
-    fs->instructions[0].inst0 = R500_INST_TYPE_OUT |
-        R500_INST_TEX_SEM_WAIT |
-        R500_INST_LAST |
-        R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK |
-        R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP;
-    fs->instructions[0].inst1 =
-        R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST |
-        R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST;
-    fs->instructions[0].inst2 =
-        R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST |
-        R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST;
-    fs->instructions[0].inst3 =
-        R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R |
-        R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B |
-        R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R |
-        R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B;
-    fs->instructions[0].inst4 =
-        R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A;
-    fs->instructions[0].inst5 =
-        R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 |
-        R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 |
-        R500_ALU_RGBA_A_SWIZ_0;
-
-    fs->shader.translated = true;
-}
-
 void r300_translate_shader(struct r300_context* r300,
                            struct r300_fragment_shader* fs)
 {
-    r300_make_passthrough_fragment_shader(fs);
+    /* XXX fix this at some point */
+    *fs = r300_passthrough_fragment_shader;
 }
 
 void r500_translate_shader(struct r300_context* r300,
                            struct r500_fragment_shader* fs)
 {
-    r500_make_passthrough_fragment_shader(fs);
+    /* XXX fix this at some point */
+    *fs = r500_passthrough_fragment_shader;
 }
diff --git a/src/gallium/drivers/r300/r300_state_shader.h b/src/gallium/drivers/r300/r300_state_shader.h
index 030ecaa56ee..8e9ed5d59e0 100644
--- a/src/gallium/drivers/r300/r300_state_shader.h
+++ b/src/gallium/drivers/r300/r300_state_shader.h
@@ -33,4 +33,57 @@ void r300_translate_shader(struct r300_context* r300,
 void r500_translate_shader(struct r300_context* r300,
                            struct r500_fragment_shader* fs);
 
+static const struct r300_fragment_shader r300_passthrough_fragment_shader = {
+    /* XXX This is the emission code. TODO: decode
+    OUT_CS_REG(R300_US_CONFIG, 0);
+    OUT_CS_REG(R300_US_CODE_OFFSET, 0x0);
+    OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0);
+    OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0);
+    OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0);
+    OUT_CS_REG(R300_US_CODE_ADDR_3, 0x400000);
+    OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4);
+    OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A);
+    OUT_CS(R300_US_OUT_FMT_UNUSED);
+    OUT_CS(R300_US_OUT_FMT_UNUSED);
+    OUT_CS(R300_US_OUT_FMT_UNUSED);
+    OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0); */
+    .alu_instruction_count = 1;
+    .tex_instruction_count = 0;
+    .indirections = 1;
+    .shader.stack_size = 2;
+
+    /* XXX decode these */
+    .instructions[0].alu_rgb_inst = 0x50A80;
+    .instructions[0].alu_rgb_inst = 0x1C000000;
+    .instructions[0].alu_alpha_inst = 0x40889;
+    .instructions[0].alu_alpha_inst = 0x1000000;
+};
+
+static const struct r500_fragment_shader r500_passthrough_fragment_shader = {
+    .shader.stack_size = 0,
+    .instruction_count = 1,
+    .instructions[0].inst0 = R500_INST_TYPE_OUT |
+        R500_INST_TEX_SEM_WAIT | R500_INST_LAST |
+        R500_INST_RGB_OMASK_RGB | R500_INST_ALPHA_OMASK |
+        R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP,
+    .instructions[0].inst1 =
+        R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST |
+        R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST,
+    .instructions[0].inst2 =
+        R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST |
+        R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST,
+    .instructions[0].inst3 =
+        R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R |
+        R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B |
+        R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R |
+        R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B,
+    .instructions[0].inst4 =
+        R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A,
+    .instructions[0].inst5 =
+        R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 |
+        R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 |
+        R500_ALU_RGBA_A_SWIZ_0,
+    .shader.translated = TRUE,
+};
+
 #endif /* R300_STATE_SHADER_H */
diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c
index 4bd8a254600..54ab778ce7c 100644
--- a/src/gallium/drivers/r300/r300_surface.c
+++ b/src/gallium/drivers/r300/r300_surface.c
@@ -54,7 +54,7 @@ static void r300_surface_fill(struct pipe_context* pipe,
         return;
     }
 
-    BEGIN_CS((caps->is_r500 ? 222 : 213) + (caps->has_tcl ? 34 : 4));
+    BEGIN_CS(172 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2));
     R300_PACIFY;
     OUT_CS_REG(R300_TX_INVALTAGS, 0x0);
     R300_PACIFY;
@@ -197,7 +197,7 @@ static void r300_surface_fill(struct pipe_context* pipe,
         ((h * 6) & R300_POINTSIZE_Y_MASK) |
         ((w * 6) << R300_POINTSIZE_X_SHIFT));
 
-    /* XXX RS block and fp setup */
+    /* RS block setup */
     if (caps->is_r500) {
         /* XXX We seem to be in disagreement about how many of these we have
          * RS:RS_IP_[0-15] [R/W] 32 bits Access: 8/16/32 MMReg:0x4074-0x40b0
@@ -213,40 +213,6 @@ static void r300_surface_fill(struct pipe_context* pipe,
         OUT_CS((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN);
         OUT_CS(0x00000000);
         OUT_CS_REG(R500_RS_INST_0, R500_RS_INST_COL_CN_WRITE);
-
-        OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO);
-        OUT_CS_REG(R500_US_PIXSIZE, 0x00000000);
-        OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) |
-            R500_US_CODE_END_ADDR(1));
-        OUT_CS_REG(R500_US_CODE_RANGE, R500_US_CODE_RANGE_ADDR(0) |
-            R500_US_CODE_RANGE_SIZE(1));
-        OUT_CS_REG(R500_US_CODE_OFFSET, R500_US_CODE_OFFSET_ADDR(0));
-        R300_PACIFY;
-        OUT_CS_REG(R500_GA_US_VECTOR_INDEX,
-            0 | R500_GA_US_VECTOR_INDEX_TYPE_INSTR);
-        OUT_CS_REG(R500_GA_US_VECTOR_DATA,
-            R500_INST_TYPE_OUT | R500_INST_TEX_SEM_WAIT | R500_INST_LAST |
-            R500_INST_RGB_OMASK_R | R500_INST_RGB_OMASK_G |
-            R500_INST_RGB_OMASK_B | R500_INST_ALPHA_OMASK |
-            R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP);
-        OUT_CS_REG(R500_GA_US_VECTOR_DATA,
-            R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST |
-            R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST);
-        OUT_CS_REG(R500_GA_US_VECTOR_DATA,
-            R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) |
-            R500_ALPHA_ADDR1_CONST | R500_ALPHA_ADDR2(0) |
-            R500_ALPHA_ADDR2_CONST);
-        OUT_CS_REG(R500_GA_US_VECTOR_DATA,
-            R500_ALU_RGB_SEL_A_SRC0 | R500_ALU_RGB_R_SWIZ_A_R |
-            R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B |
-            R500_ALU_RGB_SEL_B_SRC0 | R500_ALU_RGB_R_SWIZ_B_R |
-            R500_ALU_RGB_B_SWIZ_B_G | R500_ALU_RGB_G_SWIZ_B_B);
-        OUT_CS_REG(R500_GA_US_VECTOR_DATA,
-            R500_ALPHA_OP_CMP | R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_A);
-        OUT_CS_REG(R500_GA_US_VECTOR_DATA,
-            R500_ALU_RGBA_OP_CMP | R500_ALU_RGBA_R_SWIZ_0 |
-            R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 |
-            R500_ALU_RGBA_A_SWIZ_0);
     } else {
         OUT_CS_REG_SEQ(R300_RS_IP_0, 8);
         for (i = 0; i < 8; i++) {
@@ -258,26 +224,17 @@ static void r300_surface_fill(struct pipe_context* pipe,
         /* XXX Shouldn't this be 0? */
         OUT_CS(1);
         OUT_CS_REG(R300_RS_INST_0, R300_RS_INST_COL_CN_WRITE);
+    }
+    END_CS;
 
-        /* XXX magic numbers */
-        OUT_CS_REG(R300_US_CONFIG, 0);
-        OUT_CS_REG(R300_US_PIXSIZE, 2);
-        OUT_CS_REG(R300_US_CODE_OFFSET, 0x0);
-        OUT_CS_REG(R300_US_CODE_ADDR_0, 0x0);
-        OUT_CS_REG(R300_US_CODE_ADDR_1, 0x0);
-        OUT_CS_REG(R300_US_CODE_ADDR_2, 0x0);
-        OUT_CS_REG(R300_US_CODE_ADDR_3, 0x400000);
-        OUT_CS_REG(R300_US_ALU_RGB_INST_0, 0x50A80);
-        OUT_CS_REG(R300_US_ALU_RGB_ADDR_0, 0x1C000000);
-        OUT_CS_REG(R300_US_ALU_ALPHA_INST_0, 0x40889);
-        OUT_CS_REG(R300_US_ALU_ALPHA_ADDR_0, 0x1000000);
-        OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4);
-        OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A);
-        OUT_CS(R300_US_OUT_FMT_UNUSED);
-        OUT_CS(R300_US_OUT_FMT_UNUSED);
-        OUT_CS(R300_US_OUT_FMT_UNUSED);
-        OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0);
+    /* Fragment shader setup */
+    if (caps->is_r500) {
+        r500_emit_fragment_shader(r300, &r500_passthrough_fragment_shader);
+    } else {
+        r300_emit_fragment_shader(r300, &r300_passthrough_fragment_shader);
     }
+
+    BEGIN_CS(2 + (caps->has_tcl ? 30 : 2));
     /* XXX these magic numbers should be explained when
      * this becomes a cached state object */
     if (caps->has_tcl) {
diff --git a/src/gallium/drivers/r300/r300_surface.h b/src/gallium/drivers/r300/r300_surface.h
index e1d53116a1f..17d6c62fe83 100644
--- a/src/gallium/drivers/r300/r300_surface.h
+++ b/src/gallium/drivers/r300/r300_surface.h
@@ -31,6 +31,7 @@
 #include "r300_context.h"
 #include "r300_cs.h"
 #include "r300_emit.h"
+#include "r300_state_shader.h"
 
 const struct r300_blend_state blend_clear_state = {
     .blend_control = 0x0,