diff options
author | Eric Anholt <eric@anholt.net> | 2016-03-15 14:15:51 -0700 |
---|---|---|
committer | Eric Anholt <eric@anholt.net> | 2016-05-06 10:25:55 -0700 |
commit | d36b28402f54282aa602d61c89af008100b50799 (patch) | |
tree | 914b36fde9f4d58b8e5703e4b7a126280b31a5c5 /src | |
parent | 419fee92eef229314e28879a7b8a6a8dc3b4b549 (diff) |
vc4: Reuse QPU disasm's cond flags in QIR.
In the process, this made me flatten out the "%s%s%s%s" fprintf arguments.
Diffstat (limited to 'src')
-rw-r--r-- | src/gallium/drivers/vc4/vc4_qir.c | 19 | ||||
-rw-r--r-- | src/gallium/drivers/vc4/vc4_qpu.h | 3 | ||||
-rw-r--r-- | src/gallium/drivers/vc4/vc4_qpu_disasm.c | 51 |
3 files changed, 46 insertions, 27 deletions
diff --git a/src/gallium/drivers/vc4/vc4_qir.c b/src/gallium/drivers/vc4/vc4_qir.c index 3ba98ca9141..faf5280103e 100644 --- a/src/gallium/drivers/vc4/vc4_qir.c +++ b/src/gallium/drivers/vc4/vc4_qir.c @@ -283,20 +283,11 @@ qir_print_reg(struct vc4_compile *c, struct qreg reg, bool write) void qir_dump_inst(struct vc4_compile *c, struct qinst *inst) { - static const char *conditions[] = { - [QPU_COND_ALWAYS] = "", - [QPU_COND_NEVER] = ".never", - [QPU_COND_ZS] = ".zs", - [QPU_COND_ZC] = ".zc", - [QPU_COND_NS] = ".ns", - [QPU_COND_NC] = ".nc", - [QPU_COND_CS] = ".cs", - [QPU_COND_CC] = ".cc", - }; - fprintf(stderr, "%s%s%s ", - qir_get_op_name(inst->op), - conditions[inst->cond], - inst->sf ? ".sf" : ""); + fprintf(stderr, "%s", qir_get_op_name(inst->op)); + vc4_qpu_disasm_cond(stderr, inst->cond); + if (inst->sf) + fprintf(stderr, ".sf"); + fprintf(stderr, " "); qir_print_reg(c, inst->dst, true); if (inst->dst.pack) { diff --git a/src/gallium/drivers/vc4/vc4_qpu.h b/src/gallium/drivers/vc4/vc4_qpu.h index 7c4ff1701ca..b7dab1615d2 100644 --- a/src/gallium/drivers/vc4/vc4_qpu.h +++ b/src/gallium/drivers/vc4/vc4_qpu.h @@ -229,4 +229,7 @@ vc4_qpu_disasm_unpack(FILE *out, uint32_t pack); void vc4_qpu_validate(uint64_t *insts, uint32_t num_inst); +void +vc4_qpu_disasm_cond(FILE *out, uint32_t cond); + #endif /* VC4_QPU_H */ diff --git a/src/gallium/drivers/vc4/vc4_qpu_disasm.c b/src/gallium/drivers/vc4/vc4_qpu_disasm.c index c46fd1a0e3f..673c1bba092 100644 --- a/src/gallium/drivers/vc4/vc4_qpu_disasm.c +++ b/src/gallium/drivers/vc4/vc4_qpu_disasm.c @@ -213,7 +213,7 @@ static const char *qpu_pack_a[] = { [QPU_PACK_A_8D_SAT] = ".8d.sat", }; -static const char *qpu_condflags[] = { +static const char *qpu_cond[] = { [QPU_COND_NEVER] = ".never", [QPU_COND_ALWAYS] = "", [QPU_COND_ZS] = ".zs", @@ -264,6 +264,12 @@ vc4_qpu_disasm_unpack(FILE *out, uint32_t unpack) fprintf(out, ".%s", DESC(qpu_unpack, unpack)); } +void +vc4_qpu_disasm_cond(FILE *out, uint32_t cond) +{ + fprintf(out, "%s", DESC(qpu_cond, cond)); +} + static void print_alu_dst(uint64_t inst, bool is_mul) { @@ -337,11 +343,18 @@ print_add_op(uint64_t inst) QPU_GET_FIELD(inst, QPU_ADD_A) == QPU_GET_FIELD(inst, QPU_ADD_B)); - fprintf(stderr, "%s%s%s ", - is_mov ? "mov" : DESC(qpu_add_opcodes, op_add), - ((inst & QPU_SF) && op_add != QPU_A_NOP) ? ".sf" : "", - op_add != QPU_A_NOP ? DESC(qpu_condflags, cond) : ""); + if (is_mov) + fprintf(stderr, "mov"); + else + fprintf(stderr, DESC(qpu_add_opcodes, op_add)); + + if ((inst & QPU_SF) && op_add != QPU_A_NOP) + fprintf(stderr, ".sf"); + if (op_add != QPU_A_NOP) + vc4_qpu_disasm_cond(stderr, cond); + + fprintf(stderr, " "); print_alu_dst(inst, false); fprintf(stderr, ", "); @@ -364,11 +377,18 @@ print_mul_op(uint64_t inst) QPU_GET_FIELD(inst, QPU_MUL_A) == QPU_GET_FIELD(inst, QPU_MUL_B)); - fprintf(stderr, "%s%s%s ", - is_mov ? "mov" : DESC(qpu_mul_opcodes, op_mul), - ((inst & QPU_SF) && op_add == QPU_A_NOP) ? ".sf" : "", - op_mul != QPU_M_NOP ? DESC(qpu_condflags, cond) : ""); + if (is_mov) + fprintf(stderr, "mov"); + else + fprintf(stderr, "%s", DESC(qpu_mul_opcodes, op_mul)); + if ((inst & QPU_SF) && op_add == QPU_A_NOP) + fprintf(stderr, ".sf"); + + if (op_mul != QPU_M_NOP) + vc4_qpu_disasm_cond(stderr, cond); + + fprintf(stderr, " "); print_alu_dst(inst, true); fprintf(stderr, ", "); @@ -390,12 +410,17 @@ print_load_imm(uint64_t inst) uint32_t cond_mul = QPU_GET_FIELD(inst, QPU_COND_MUL); fprintf(stderr, "load_imm "); + print_alu_dst(inst, false); - fprintf(stderr, "%s, ", (waddr_add != QPU_W_NOP ? - DESC(qpu_condflags, cond_add) : "")); + if (waddr_add != QPU_W_NOP) + vc4_qpu_disasm_cond(stderr, cond_add); + fprintf(stderr, ", "); + print_alu_dst(inst, true); - fprintf(stderr, "%s, ", (waddr_mul != QPU_W_NOP ? - DESC(qpu_condflags, cond_mul) : "")); + if (waddr_mul != QPU_W_NOP) + vc4_qpu_disasm_cond(stderr, cond_mul); + fprintf(stderr, ", "); + fprintf(stderr, "0x%08x (%f)", imm, uif(imm)); } |