diff options
author | Michel Dänzer <[email protected]> | 2010-03-12 19:00:47 +0100 |
---|---|---|
committer | Michel Dänzer <[email protected]> | 2010-03-12 19:00:47 +0100 |
commit | b13e305ee1a2454265fd957a99640a2e49507bea (patch) | |
tree | e62dfd0ff761ec89de478499130d58d4b119aa0d /src | |
parent | d1ca1599f0319f5c99852ce24420aa592e806db0 (diff) | |
parent | 8561bec0ac1ae5a8871c86f1f2cc29d44cb0f878 (diff) |
Merge branch '7.8'
Diffstat (limited to 'src')
31 files changed, 111 insertions, 145 deletions
diff --git a/src/gallium/auxiliary/os/os_time.h b/src/gallium/auxiliary/os/os_time.h index 5b55c1b3747..7e0f67a76b0 100644 --- a/src/gallium/auxiliary/os/os_time.h +++ b/src/gallium/auxiliary/os/os_time.h @@ -71,7 +71,7 @@ os_time_sleep(int64_t usecs); /* * Helper function for detecting time outs, taking in account overflow. * - * Returns true the the current time has elapsed beyond the specified interval. + * Returns true if the current time has elapsed beyond the specified interval. */ static INLINE boolean os_time_timeout(int64_t start, diff --git a/src/gallium/drivers/cell/ppu/cell_gen_fragment.c b/src/gallium/drivers/cell/ppu/cell_gen_fragment.c index 576d514741d..c54576b3c32 100644 --- a/src/gallium/drivers/cell/ppu/cell_gen_fragment.c +++ b/src/gallium/drivers/cell/ppu/cell_gen_fragment.c @@ -1352,7 +1352,7 @@ gen_stencil_values(struct spe_function *f, */ ASSERT(fbS_reg != newS_reg); - /* The code also assumes the the stencil_max_value is of the form + /* The code also assumes that the stencil_max_value is of the form * 2^n-1 and can therefore be used as a mask for the valid bits in * addition to a maximum. Make sure this is the case as well. * The clever math below exploits the fact that incrementing a diff --git a/src/gallium/drivers/cell/ppu/cell_spu.c b/src/gallium/drivers/cell/ppu/cell_spu.c index 28e5e6d706d..39284f3a5d1 100644 --- a/src/gallium/drivers/cell/ppu/cell_spu.c +++ b/src/gallium/drivers/cell/ppu/cell_spu.c @@ -135,7 +135,7 @@ cell_thread_function(void *arg) /** * Create the SPU threads. This is done once during driver initialization. - * This involves setting the the "init" message which is sent to each SPU. + * This involves setting the "init" message which is sent to each SPU. * The init message specifies an SPU id, total number of SPUs, location * and number of batch buffers, etc. */ diff --git a/src/gallium/drivers/nv40/nv40_vertprog.c b/src/gallium/drivers/nv40/nv40_vertprog.c index b289eef0fc2..c93c5d127c4 100644 --- a/src/gallium/drivers/nv40/nv40_vertprog.c +++ b/src/gallium/drivers/nv40/nv40_vertprog.c @@ -742,7 +742,7 @@ nv40_vertprog_translate(struct nv40_context *nv40, } /* Redirect post-transform vertex position to a temp if user clip - * planes are enabled. We need to append code the the vtxprog + * planes are enabled. We need to append code to the vtxprog * to handle clip planes later. */ if (vp->ucp.nr) { diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index a249e8b36be..c67cc868713 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -540,7 +540,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_PVS_FIRST_INST(x) ((x) << 0) # define R300_PVS_XYZW_VALID_INST(x) ((x) << 10) # define R300_PVS_LAST_INST(x) ((x) << 20) -/* Addresses are relative the the vertex program parameters area. */ +/* Addresses are relative to the vertex program parameters area. */ #define R300_VAP_PVS_CONST_CNTL 0x22D4 # define R300_PVS_CONST_BASE_OFFSET_SHIFT 0 # define R300_PVS_MAX_CONST_ADDR_SHIFT 16 @@ -1857,7 +1857,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. * The destination register index is in FPI1 (color) and FPI3 (alpha) * together with enable bits. * There are separate enable bits for writing into temporary registers - * (DSTC_REG_* /DSTA_REG) and and program output registers (DSTC_OUTPUT_* + * (DSTC_REG_* /DSTA_REG) and program output registers (DSTC_OUTPUT_* * /DSTA_OUTPUT). You can write to both at once, or not write at all (the * same index must be used for both). * diff --git a/src/gallium/state_trackers/dri/dri_screen.c b/src/gallium/state_trackers/dri/dri_screen.c index 60bc560049c..7ccad8f5dd6 100644 --- a/src/gallium/state_trackers/dri/dri_screen.c +++ b/src/gallium/state_trackers/dri/dri_screen.c @@ -90,6 +90,9 @@ dri_fill_in_modes(struct dri_screen *screen, unsigned pixel_bits) { __DRIconfig **configs = NULL; + __DRIconfig **configs_r5g6b5 = NULL; + __DRIconfig **configs_a8r8g8b8 = NULL; + __DRIconfig **configs_x8r8g8b8 = NULL; unsigned num_modes; uint8_t depth_bits_array[5]; uint8_t stencil_bits_array[5]; @@ -127,25 +130,23 @@ dri_fill_in_modes(struct dri_screen *screen, pf_x8r8g8b8 = p_screen->is_format_supported(p_screen, PIPE_FORMAT_B8G8R8X8_UNORM, PIPE_TEXTURE_2D, PIPE_TEXTURE_USAGE_RENDER_TARGET, 0); - - /* we support buffers with different depths only if we can tell the driver - * the actual depth of each of them. */ - if (screen->sPriv->dri2.loader - && (screen->sPriv->dri2.loader->base.version > 2) - && (screen->sPriv->dri2.loader->getBuffersWithFormat != NULL)) { + pf_r5g6b5 = p_screen->is_format_supported(p_screen, PIPE_FORMAT_B5G6R5_UNORM, + PIPE_TEXTURE_2D, + PIPE_TEXTURE_USAGE_RENDER_TARGET, 0); + + /* We can only get a 16 or 32 bit depth buffer with getBuffersWithFormat */ + if (screen->sPriv->dri2.loader && + (screen->sPriv->dri2.loader->base.version > 2) && + (screen->sPriv->dri2.loader->getBuffersWithFormat != NULL)) { pf_z16 = p_screen->is_format_supported(p_screen, PIPE_FORMAT_Z16_UNORM, PIPE_TEXTURE_2D, PIPE_TEXTURE_USAGE_DEPTH_STENCIL, 0); pf_z32 = p_screen->is_format_supported(p_screen, PIPE_FORMAT_Z32_UNORM, PIPE_TEXTURE_2D, PIPE_TEXTURE_USAGE_DEPTH_STENCIL, 0); - pf_r5g6b5 = p_screen->is_format_supported(p_screen, PIPE_FORMAT_B5G6R5_UNORM, - PIPE_TEXTURE_2D, - PIPE_TEXTURE_USAGE_RENDER_TARGET, 0); } else { pf_z16 = FALSE; pf_z32 = FALSE; - pf_r5g6b5 = FALSE; } if (pf_z16) { @@ -175,46 +176,48 @@ dri_fill_in_modes(struct dri_screen *screen, num_modes = depth_buffer_factor * back_buffer_factor * msaa_samples_factor * 4; - if (pixel_bits == 16 && pf_r5g6b5) { - configs = driCreateConfigs(GL_RGB, GL_UNSIGNED_SHORT_5_6_5, - depth_bits_array, stencil_bits_array, - depth_buffer_factor, back_buffer_modes, - back_buffer_factor, - msaa_samples_array, msaa_samples_factor, - GL_TRUE); + if (pf_r5g6b5) + configs_r5g6b5 = driCreateConfigs(GL_RGB, GL_UNSIGNED_SHORT_5_6_5, + depth_bits_array, stencil_bits_array, + depth_buffer_factor, back_buffer_modes, + back_buffer_factor, + msaa_samples_array, msaa_samples_factor, + GL_TRUE); + + if (pf_a8r8g8b8) + configs_a8r8g8b8 = driCreateConfigs(GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV, + depth_bits_array, + stencil_bits_array, + depth_buffer_factor, + back_buffer_modes, + back_buffer_factor, + msaa_samples_array, + msaa_samples_factor, + GL_TRUE); + + if (pf_x8r8g8b8) + configs_x8r8g8b8 = driCreateConfigs(GL_BGR, GL_UNSIGNED_INT_8_8_8_8_REV, + depth_bits_array, + stencil_bits_array, + depth_buffer_factor, + back_buffer_modes, + back_buffer_factor, + msaa_samples_array, + msaa_samples_factor, + GL_TRUE); + + if (pixel_bits == 16) { + configs = configs_r5g6b5; + if (configs_a8r8g8b8) + configs = configs ? driConcatConfigs(configs, configs_a8r8g8b8) : configs_a8r8g8b8; + if (configs_x8r8g8b8) + configs = configs ? driConcatConfigs(configs, configs_x8r8g8b8) : configs_x8r8g8b8; } else { - __DRIconfig **configs_a8r8g8b8 = NULL; - __DRIconfig **configs_x8r8g8b8 = NULL; - - if (pf_a8r8g8b8) - configs_a8r8g8b8 = driCreateConfigs(GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV, - depth_bits_array, - stencil_bits_array, - depth_buffer_factor, - back_buffer_modes, - back_buffer_factor, - msaa_samples_array, - msaa_samples_factor, - GL_TRUE); - if (pf_x8r8g8b8) - configs_x8r8g8b8 = driCreateConfigs(GL_BGR, GL_UNSIGNED_INT_8_8_8_8_REV, - depth_bits_array, - stencil_bits_array, - depth_buffer_factor, - back_buffer_modes, - back_buffer_factor, - msaa_samples_array, - msaa_samples_factor, - GL_TRUE); - - if (configs_a8r8g8b8 && configs_x8r8g8b8) - configs = driConcatConfigs(configs_x8r8g8b8, configs_a8r8g8b8); - else if (configs_a8r8g8b8) - configs = configs_a8r8g8b8; - else if (configs_x8r8g8b8) - configs = configs_x8r8g8b8; - else - configs = NULL; + configs = configs_a8r8g8b8; + if (configs_x8r8g8b8) + configs = configs ? driConcatConfigs(configs, configs_x8r8g8b8) : configs_x8r8g8b8; + if (configs_r5g6b5) + configs = configs ? driConcatConfigs(configs, configs_r5g6b5) : configs_r5g6b5; } if (configs == NULL) { diff --git a/src/gallium/state_trackers/wgl/stw_framebuffer.h b/src/gallium/state_trackers/wgl/stw_framebuffer.h index 08cc4973bce..e61e9bf9c26 100644 --- a/src/gallium/state_trackers/wgl/stw_framebuffer.h +++ b/src/gallium/state_trackers/wgl/stw_framebuffer.h @@ -45,7 +45,7 @@ struct stw_framebuffer /** * This mutex has two purposes: * - protect the access to the mutable data members below - * - prevent the the framebuffer from being deleted while being accessed. + * - prevent the framebuffer from being deleted while being accessed. * * It is OK to lock this mutex while holding the stw_device::fb_mutex lock, * but the opposite must never happen. diff --git a/src/gallium/winsys/drm/vmware/dri/SConscript b/src/gallium/winsys/drm/vmware/dri/SConscript index 84319f91ff1..d26d0cd7483 100644 --- a/src/gallium/winsys/drm/vmware/dri/SConscript +++ b/src/gallium/winsys/drm/vmware/dri/SConscript @@ -48,6 +48,7 @@ if env['platform'] == 'linux': svgadrm, svga, mesa, + glsl, gallium, ]) diff --git a/src/glu/sgi/libnurbs/nurbtess/partitionY.h b/src/glu/sgi/libnurbs/nurbtess/partitionY.h index 8dda409de1a..5570c183d79 100644 --- a/src/glu/sgi/libnurbs/nurbtess/partitionY.h +++ b/src/glu/sgi/libnurbs/nurbtess/partitionY.h @@ -39,7 +39,7 @@ *or both at or below v. In addition, at least one of the ajacent verteces is *strictly below or above v. * A vertex is a relex vertex if the internals angle is strictly greater than - *180. In other words, if the the signed area is negative: + *180. In other words, if the signed area is negative: *(x1, y1), (x2, y2), (x3, y3) are the three vertices along a polygon, the *order is such that left hand side is inside the polygon. Then (x2,y2) is *reflex if: diff --git a/src/glu/sgi/libtess/normal.c b/src/glu/sgi/libtess/normal.c index 0a2494be343..7ab83167bbd 100644 --- a/src/glu/sgi/libtess/normal.c +++ b/src/glu/sgi/libtess/normal.c @@ -142,7 +142,7 @@ static void CheckOrientation( GLUtesselator *tess ) GLUhalfEdge *e; /* When we compute the normal automatically, we choose the orientation - * so that the the sum of the signed areas of all contours is non-negative. + * so that the sum of the signed areas of all contours is non-negative. */ area = 0; for( f = fHead->next; f != fHead; f = f->next ) { diff --git a/src/mesa/drivers/dri/common/dri_util.c b/src/mesa/drivers/dri/common/dri_util.c index 890ae513397..75c98825b79 100644 --- a/src/mesa/drivers/dri/common/dri_util.c +++ b/src/mesa/drivers/dri/common/dri_util.c @@ -698,7 +698,7 @@ setupLoaderExtensions(__DRIscreen *psp, * \param drm_version Version of the kernel DRM. * \param frame_buffer Data describing the location and layout of the * framebuffer. - * \param pSAREA Pointer the the SAREA. + * \param pSAREA Pointer to the SAREA. * \param fd Device handle for the DRM. * \param extensions ?? * \param driver_modes Returns modes suppoted by the driver diff --git a/src/mesa/drivers/dri/r128/r128_tex.c b/src/mesa/drivers/dri/r128/r128_tex.c index 24fbf8f5194..4ec4be9a47b 100644 --- a/src/mesa/drivers/dri/r128/r128_tex.c +++ b/src/mesa/drivers/dri/r128/r128_tex.c @@ -468,7 +468,7 @@ static void r128TexEnv( GLcontext *ctx, GLenum target, * certain point. It is better than completely ignoring the LOD * bias. Unfortunately there isn't much range in the bias, the * spec mentions strides that vary between 0.5 and 2.0 but these - * numbers don't seem to relate the the GL LOD bias value at all. + * numbers don't seem to relate to the GL LOD bias value at all. */ if ( param[0] >= 1.0 ) { bias = -128; diff --git a/src/mesa/drivers/dri/r200/r200_reg.h b/src/mesa/drivers/dri/r200/r200_reg.h index 2e52c7c13ff..e331be223b8 100644 --- a/src/mesa/drivers/dri/r200/r200_reg.h +++ b/src/mesa/drivers/dri/r200/r200_reg.h @@ -690,7 +690,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. # define R200_PVS_CNTL_1_PROGRAM_START_SHIFT 0 # define R200_PVS_CNTL_1_POS_END_SHIFT 10 # define R200_PVS_CNTL_1_PROGRAM_END_SHIFT 20 -/* Addresses are relative the the vertex program parameters area. */ +/* Addresses are relative to the vertex program parameters area. */ #define R200_VAP_PVS_CNTL_2 0x22d4 # define R200_PVS_CNTL_2_PARAM_OFFSET_SHIFT 0 # define R200_PVS_CNTL_2_PARAM_COUNT_SHIFT 16 diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h index d18ebab8ff2..ac93563ed9e 100644 --- a/src/mesa/drivers/dri/r300/r300_reg.h +++ b/src/mesa/drivers/dri/r300/r300_reg.h @@ -482,7 +482,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_PVS_FIRST_INST_SHIFT 0 # define R300_PVS_XYZW_VALID_INST_SHIFT 10 # define R300_PVS_LAST_INST_SHIFT 20 -/* Addresses are relative the the vertex program parameters area. */ +/* Addresses are relative to the vertex program parameters area. */ #define R300_VAP_PVS_CONST_CNTL 0x22D4 # define R300_PVS_CONST_BASE_OFFSET_SHIFT 0 # define R300_PVS_MAX_CONST_ADDR_SHIFT 16 @@ -1760,7 +1760,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. * The destination register index is in FPI1 (color) and FPI3 (alpha) * together with enable bits. * There are separate enable bits for writing into temporary registers - * (DSTC_REG_* /DSTA_REG) and and program output registers (DSTC_OUTPUT_* + * (DSTC_REG_* /DSTA_REG) and program output registers (DSTC_OUTPUT_* * /DSTA_OUTPUT). You can write to both at once, or not write at all (the * same index must be used for both). * diff --git a/src/mesa/drivers/dri/r600/r700_vertprog.c b/src/mesa/drivers/dri/r600/r700_vertprog.c index 07e0adc8905..05c65164d60 100644 --- a/src/mesa/drivers/dri/r600/r700_vertprog.c +++ b/src/mesa/drivers/dri/r600/r700_vertprog.c @@ -42,7 +42,7 @@ #include "radeon_debug.h" #include "r600_context.h" #include "r600_cmdbuf.h" -#include "shader/programopt.c" +#include "shader/programopt.h" #include "r700_debug.h" #include "r700_vertprog.h" diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c index 78c5f5dd572..7f5fb99fa4f 100644 --- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c +++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c @@ -553,6 +553,8 @@ static radeon_mipmap_tree * get_biggest_matching_miptree(radeonTexObj *texObj, } if (mtCount == 0) { + free(mtSizes); + free(mts); return NULL; } diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c index ebae0792aa5..0afbc19c127 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state.c +++ b/src/mesa/drivers/dri/radeon/radeon_state.c @@ -1901,7 +1901,7 @@ void radeonUploadTexMatrix( r100ContextPtr rmesa, So: if we need the q coord in the end (solely determined by the texture target, i.e. 2d / 1d / texrect targets) we swap the third and 4th row. Additionally, if we don't have texgen but 4 tex coords submitted, we swap - column 3 and 4 (for the 2d / 1d / texrect targets) since the the q coord + column 3 and 4 (for the 2d / 1d / texrect targets) since the q coord will get submitted in the "wrong", i.e. 3rd, slot. If an app submits 3 coords for 2d targets, we assume it is saving on vertex size and using the texture matrix to swap the r and q coords around (ut2k3 diff --git a/src/mesa/drivers/x11/xmesa.h b/src/mesa/drivers/x11/xmesa.h index 98139af8336..f63626a9702 100644 --- a/src/mesa/drivers/x11/xmesa.h +++ b/src/mesa/drivers/x11/xmesa.h @@ -287,7 +287,7 @@ extern void XMesaCopySubBuffer( XMesaBuffer b, /* - * Return a pointer to the the Pixmap or XImage being used as the back + * Return a pointer to the Pixmap or XImage being used as the back * color buffer of an XMesaBuffer. This function is a way to get "under * the hood" of X/Mesa so one can manipulate the back buffer directly. * Input: b - the XMesaBuffer diff --git a/src/mesa/drivers/x11/xmesaP.h b/src/mesa/drivers/x11/xmesaP.h index 3ffd7661e35..e0a6908228d 100644 --- a/src/mesa/drivers/x11/xmesaP.h +++ b/src/mesa/drivers/x11/xmesaP.h @@ -431,7 +431,7 @@ extern const int xmesa_kernel8[DITH_DY * DITH_DX]; * If pixelformat==PF_HPCR: * * HP Color Recovery dithering ([email protected] 30/08/95) - * HP has on it's 8-bit 700-series computers, a feature called + * HP has on its 8-bit 700-series computers, a feature called * 'Color Recovery'. This allows near 24-bit output (so they say). * It is enabled by selecting the 8-bit TrueColor visual AND * corresponding colormap (see tkInitWindow) AND doing some special diff --git a/src/mesa/main/dd.h b/src/mesa/main/dd.h index 197de09b22a..7c02faaa535 100644 --- a/src/mesa/main/dd.h +++ b/src/mesa/main/dd.h @@ -1072,7 +1072,7 @@ struct dd_function_table { * These are the initial values to be installed into dispatch by * mesa. If the T&L driver wants to modify the dispatch table * while installed, it must do so itself. It would be possible for - * the vertexformat to install it's own initial values for these + * the vertexformat to install its own initial values for these * functions, but this way there is an obvious list of what is * expected of the driver. * diff --git a/src/mesa/main/texcompress_fxt1.c b/src/mesa/main/texcompress_fxt1.c index 149853f7acd..04acf05e528 100644 --- a/src/mesa/main/texcompress_fxt1.c +++ b/src/mesa/main/texcompress_fxt1.c @@ -476,7 +476,7 @@ fxt1_lloyd (GLfloat vec[][MAX_COMP], GLint nv, * for each sample color * sort to nearest vector. * - * replace each vector with the centroid of it's matching colors. + * replace each vector with the centroid of its matching colors. * * repeat until RMS doesn't improve. * diff --git a/src/mesa/math/m_debug_util.h b/src/mesa/math/m_debug_util.h index 2e67db8e55d..ed11c849ece 100644 --- a/src/mesa/math/m_debug_util.h +++ b/src/mesa/math/m_debug_util.h @@ -61,7 +61,7 @@ extern long counter_overhead; */ extern char *mesa_profile; -/* Modify the the number of tests if you like. +/* Modify the number of tests if you like. * We take the minimum of all results, because every error should be * positive (time used by other processes, task switches etc). * It is assumed that all calculations are done in the cache. diff --git a/src/mesa/math/m_matrix.c b/src/mesa/math/m_matrix.c index ef8a40fbecb..4b33d0bbb37 100644 --- a/src/mesa/math/m_matrix.c +++ b/src/mesa/math/m_matrix.c @@ -889,7 +889,7 @@ _math_matrix_rotate( GLmatrix *mat, * Y-axis to bring the axis vector parallel with the X-axis. The * rotation about the X-axis is then performed. Ry and Rz are * simply the respective inverse transforms to bring the arbitrary - * axis back to it's original orientation. The first transforms + * axis back to its original orientation. The first transforms * Rz' and Ry' are considered inverses, since the data from the * arbitrary axis gives you info on how to get to it, not how * to get away from it, and an inverse must be applied. diff --git a/src/mesa/shader/lex.yy.c b/src/mesa/shader/lex.yy.c index d1af35fedb6..a08617ff8d4 100644 --- a/src/mesa/shader/lex.yy.c +++ b/src/mesa/shader/lex.yy.c @@ -53,6 +53,7 @@ typedef int flex_int32_t; typedef unsigned char flex_uint8_t; typedef unsigned short int flex_uint16_t; typedef unsigned int flex_uint32_t; +#endif /* ! C99 */ /* Limits of integral types. */ #ifndef INT8_MIN @@ -83,8 +84,6 @@ typedef unsigned int flex_uint32_t; #define UINT32_MAX (4294967295U) #endif -#endif /* ! C99 */ - #endif /* ! FLEXINT_H */ #ifdef __cplusplus @@ -158,15 +157,7 @@ typedef void* yyscan_t; /* Size of default input buffer. */ #ifndef YY_BUF_SIZE -#ifdef __ia64__ -/* On IA-64, the buffer size is 16k, not 8k. - * Moreover, YY_BUF_SIZE is 2*YY_READ_BUF_SIZE in the general case. - * Ditto for the __ia64__ case accordingly. - */ -#define YY_BUF_SIZE 32768 -#else #define YY_BUF_SIZE 16384 -#endif /* __ia64__ */ #endif /* The state buf must be large enough to hold one state per character in the main buffer. @@ -1161,7 +1152,7 @@ handle_ident(struct asm_parser_state *state, const char *text, YYSTYPE *lval) } while(0); #define YY_EXTRA_TYPE struct asm_parser_state * -#line 1165 "lex.yy.c" +#line 1156 "lex.yy.c" #define INITIAL 0 @@ -1298,12 +1289,7 @@ static int input (yyscan_t yyscanner ); /* Amount of stuff to slurp up with each read. */ #ifndef YY_READ_BUF_SIZE -#ifdef __ia64__ -/* On IA-64, the buffer size is 16k, not 8k */ -#define YY_READ_BUF_SIZE 16384 -#else #define YY_READ_BUF_SIZE 8192 -#endif /* __ia64__ */ #endif /* Copy whatever the last rule matched to the standard output. */ @@ -1311,7 +1297,7 @@ static int input (yyscan_t yyscanner ); /* This used to be an fputs(), but since the string might contain NUL's, * we now use fwrite(). */ -#define ECHO do { if (fwrite( yytext, yyleng, 1, yyout )) {} } while (0) +#define ECHO fwrite( yytext, yyleng, 1, yyout ) #endif /* Gets input and stuffs it into "buf". number of characters read, or YY_NULL, @@ -1322,7 +1308,7 @@ static int input (yyscan_t yyscanner ); if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \ { \ int c = '*'; \ - size_t n; \ + unsigned n; \ for ( n = 0; n < max_size && \ (c = getc( yyin )) != EOF && c != '\n'; ++n ) \ buf[n] = (char) c; \ @@ -1410,7 +1396,7 @@ YY_DECL #line 157 "program_lexer.l" -#line 1414 "lex.yy.c" +#line 1400 "lex.yy.c" yylval = yylval_param; @@ -2212,7 +2198,7 @@ case 142: YY_RULE_SETUP #line 326 "program_lexer.l" { - yylval->real = _mesa_strtod(yytext, NULL); + yylval->real = (float) _mesa_strtod(yytext, NULL); return REAL; } YY_BREAK @@ -2224,7 +2210,7 @@ YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP #line 330 "program_lexer.l" { - yylval->real = _mesa_strtod(yytext, NULL); + yylval->real = (float) _mesa_strtod(yytext, NULL); return REAL; } YY_BREAK @@ -2232,7 +2218,7 @@ case 144: YY_RULE_SETUP #line 334 "program_lexer.l" { - yylval->real = _mesa_strtod(yytext, NULL); + yylval->real = (float) _mesa_strtod(yytext, NULL); return REAL; } YY_BREAK @@ -2240,7 +2226,7 @@ case 145: YY_RULE_SETUP #line 338 "program_lexer.l" { - yylval->real = _mesa_strtod(yytext, NULL); + yylval->real = (float) _mesa_strtod(yytext, NULL); return REAL; } YY_BREAK @@ -2474,7 +2460,7 @@ YY_RULE_SETUP #line 481 "program_lexer.l" ECHO; YY_BREAK -#line 2478 "lex.yy.c" +#line 2464 "lex.yy.c" case YY_STATE_EOF(INITIAL): yyterminate(); @@ -3242,8 +3228,8 @@ YY_BUFFER_STATE yy_scan_string (yyconst char * yystr , yyscan_t yyscanner) /** Setup the input buffer state to scan the given bytes. The next call to yylex() will * scan from a @e copy of @a bytes. - * @param yybytes the byte buffer to scan - * @param _yybytes_len the number of bytes in the buffer pointed to by @a bytes. + * @param bytes the byte buffer to scan + * @param len the number of bytes in the buffer pointed to by @a bytes. * @param yyscanner The scanner object. * @return the newly allocated buffer state object. */ diff --git a/src/mesa/shader/prog_instruction.h b/src/mesa/shader/prog_instruction.h index 224350caac6..28c797a4ba8 100644 --- a/src/mesa/shader/prog_instruction.h +++ b/src/mesa/shader/prog_instruction.h @@ -97,8 +97,8 @@ #define COND_EQ 2 /**< equal to zero */ #define COND_LT 3 /**< less than zero */ #define COND_UN 4 /**< unordered (NaN) */ -#define COND_GE 5 /**< greater then or equal to zero */ -#define COND_LE 6 /**< less then or equal to zero */ +#define COND_GE 5 /**< greater than or equal to zero */ +#define COND_LE 6 /**< less than or equal to zero */ #define COND_NE 7 /**< not equal to zero */ #define COND_TR 8 /**< always true */ #define COND_FL 9 /**< always false */ diff --git a/src/mesa/shader/program_lexer.l b/src/mesa/shader/program_lexer.l index 83bc5089d9e..b00765793dc 100644 --- a/src/mesa/shader/program_lexer.l +++ b/src/mesa/shader/program_lexer.l @@ -324,19 +324,19 @@ ARRAYSHADOW2D { return_token_or_IDENTIFIER(require_ARB_fp && require return INTEGER; } {num}?{frac}{exp}? { - yylval->real = _mesa_strtod(yytext, NULL); + yylval->real = (float) _mesa_strtod(yytext, NULL); return REAL; } {num}"."/[^.] { - yylval->real = _mesa_strtod(yytext, NULL); + yylval->real = (float) _mesa_strtod(yytext, NULL); return REAL; } {num}{exp} { - yylval->real = _mesa_strtod(yytext, NULL); + yylval->real = (float) _mesa_strtod(yytext, NULL); return REAL; } {num}"."{exp} { - yylval->real = _mesa_strtod(yytext, NULL); + yylval->real = (float) _mesa_strtod(yytext, NULL); return REAL; } diff --git a/src/mesa/shader/program_parser.h b/src/mesa/shader/program_parser.h index 730466c30f5..be952d4b9c8 100644 --- a/src/mesa/shader/program_parser.h +++ b/src/mesa/shader/program_parser.h @@ -62,7 +62,7 @@ struct asm_symbol { */ unsigned param_binding_swizzle; - /* This is how many entries in the the program_parameter_list we take up + /* This is how many entries in the program_parameter_list we take up * with our state tokens or constants. Note that this is _not_ the same as * the number of param registers we eventually use. */ diff --git a/src/mesa/shader/slang/library/slang_common_builtin.gc b/src/mesa/shader/slang/library/slang_common_builtin.gc index 8b7771c2846..a25ca55bc42 100644 --- a/src/mesa/shader/slang/library/slang_common_builtin.gc +++ b/src/mesa/shader/slang/library/slang_common_builtin.gc @@ -695,7 +695,7 @@ vec3 normalize(const vec3 v) { // const float s = inversesqrt(dot(v, v)); // __retVal = v * s; -// XXX note, we _could_ use __retVal.w instead of tmp and and save a +// XXX note, we _could_ use __retVal.w instead of tmp and save a // register, but that's actually a compilation error because v is a vec3 // and the .w suffix is illegal. Oh well. float tmp; diff --git a/src/mesa/state_tracker/st_framebuffer.c b/src/mesa/state_tracker/st_framebuffer.c index 1d35e8d6574..0a91183f89d 100644 --- a/src/mesa/state_tracker/st_framebuffer.c +++ b/src/mesa/state_tracker/st_framebuffer.c @@ -167,9 +167,7 @@ st_set_framebuffer_surface(struct st_framebuffer *stfb, uint surfIndex, struct pipe_surface *surf) { GET_CURRENT_CONTEXT(ctx); - static const GLuint invalid_size = 9999999; struct st_renderbuffer *strb; - GLuint width, height, i; /* sanity checks */ assert(ST_SURFACE_FRONT_LEFT == BUFFER_FRONT_LEFT); @@ -183,18 +181,17 @@ st_set_framebuffer_surface(struct st_framebuffer *stfb, strb = st_renderbuffer(stfb->Base.Attachment[surfIndex].Renderbuffer); if (!strb) { - if (surfIndex == ST_SURFACE_FRONT_LEFT) { - /* Delayed creation when the window system supplies a fake front buffer */ - struct st_renderbuffer *strb_back - = st_renderbuffer(stfb->Base.Attachment[ST_SURFACE_BACK_LEFT].Renderbuffer); - struct gl_renderbuffer *rb - = st_new_renderbuffer_fb(surf->format, strb_back->Base.NumSamples, FALSE); - _mesa_add_renderbuffer(&stfb->Base, BUFFER_FRONT_LEFT, rb); - strb = st_renderbuffer(rb); - } else { - /* fail */ + /* create new renderbuffer for this surface now */ + const GLuint numSamples = stfb->Base.Visual.samples; + struct gl_renderbuffer *rb = + st_new_renderbuffer_fb(surf->format, numSamples, FALSE); + if (!rb) { + /* out of memory */ + _mesa_warning(ctx, "Out of memory allocating renderbuffer"); return; } + _mesa_add_renderbuffer(&stfb->Base, surfIndex, rb); + strb = st_renderbuffer(rb); } /* replace the renderbuffer's surface/texture pointers */ @@ -206,39 +203,16 @@ st_set_framebuffer_surface(struct st_framebuffer *stfb, * But when we do, we need to start setting this dirty bit * to ensure the renderbuffer attachements are up-to-date * via update_framebuffer. + * Core Mesa's state validation will update the parent framebuffer's + * size info, etc. */ ctx->st->dirty.st |= ST_NEW_FRAMEBUFFER; + ctx->NewState |= _NEW_BUFFERS; } /* update renderbuffer's width/height */ strb->Base.Width = surf->width; strb->Base.Height = surf->height; - - /* Try to update the framebuffer's width/height from the renderbuffer - * sizes. Before we start drawing, all the rbs _should_ be the same size. - */ - width = height = invalid_size; - for (i = 0; i < BUFFER_COUNT; i++) { - if (stfb->Base.Attachment[i].Renderbuffer) { - if (width == invalid_size) { - width = stfb->Base.Attachment[i].Renderbuffer->Width; - height = stfb->Base.Attachment[i].Renderbuffer->Height; - } - else if (width != stfb->Base.Attachment[i].Renderbuffer->Width || - height != stfb->Base.Attachment[i].Renderbuffer->Height) { - /* inconsistant renderbuffer sizes, bail out */ - return; - } - } - } - - if (width != invalid_size) { - /* OK, the renderbuffers are of a consistant size, so update the - * parent framebuffer's size. - */ - stfb->Base.Width = width; - stfb->Base.Height = height; - } } diff --git a/src/mesa/swrast/s_depth.c b/src/mesa/swrast/s_depth.c index 3e36cf9a7e5..ed637cac124 100644 --- a/src/mesa/swrast/s_depth.c +++ b/src/mesa/swrast/s_depth.c @@ -526,7 +526,7 @@ _swrast_depth_clamp_span( GLcontext *ctx, SWspan *span ) /* Convert floating point values in [0,1] to device Z coordinates in * [0, DepthMax]. - * ex: If the the Z buffer has 24 bits, DepthMax = 0xffffff. + * ex: If the Z buffer has 24 bits, DepthMax = 0xffffff. * * XXX this all falls apart if we have 31 or more bits of Z because * the triangle rasterization code produces unsigned Z values. Negative diff --git a/src/mesa/vbo/vbo_save_loopback.c b/src/mesa/vbo/vbo_save_loopback.c index f253c854d2b..3f581ea02da 100644 --- a/src/mesa/vbo/vbo_save_loopback.c +++ b/src/mesa/vbo/vbo_save_loopback.c @@ -78,7 +78,7 @@ struct loopback_attr { }; /* Don't emit ends and begins on wrapped primitives. Don't replay - * wrapped vertices. If we get here, it's probably because the the + * wrapped vertices. If we get here, it's probably because the * precalculated wrapping is wrong. */ static void loopback_prim( GLcontext *ctx, |