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authorMarek Olšák <[email protected]>2018-08-31 20:52:29 -0400
committerMarek Olšák <[email protected]>2018-09-07 17:59:02 -0400
commit9ce2cef68f37a05cd2e4e4128395af38e7be963f (patch)
treeaa7b2626dd5cff66f40968dd3bdc0e72a0a91b15 /src
parentecfe41e6902237e53459e0d6b06b2cd91fb34025 (diff)
gallium: add PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET
Diffstat (limited to 'src')
-rw-r--r--src/gallium/auxiliary/util/u_screen.c1
-rw-r--r--src/gallium/docs/source/screen.rst3
-rw-r--r--src/gallium/drivers/etnaviv/etnaviv_screen.c1
-rw-r--r--src/gallium/drivers/i915/i915_screen.c1
-rw-r--r--src/gallium/drivers/llvmpipe/lp_screen.c1
-rw-r--r--src/gallium/drivers/nouveau/nv30/nv30_screen.c1
-rw-r--r--src/gallium/drivers/nouveau/nv50/nv50_screen.c1
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nvc0_screen.c1
-rw-r--r--src/gallium/drivers/r300/r300_screen.c1
-rw-r--r--src/gallium/drivers/r600/r600_pipe.c4
-rw-r--r--src/gallium/drivers/radeonsi/si_get.c4
-rw-r--r--src/gallium/drivers/softpipe/sp_screen.c1
-rw-r--r--src/gallium/drivers/svga/svga_screen.c1
-rw-r--r--src/gallium/drivers/swr/swr_screen.cpp1
-rw-r--r--src/gallium/drivers/virgl/virgl_screen.c1
-rw-r--r--src/gallium/include/pipe/p_defines.h1
16 files changed, 24 insertions, 0 deletions
diff --git a/src/gallium/auxiliary/util/u_screen.c b/src/gallium/auxiliary/util/u_screen.c
index 4843ba57567..07c63aa3700 100644
--- a/src/gallium/auxiliary/util/u_screen.c
+++ b/src/gallium/auxiliary/util/u_screen.c
@@ -320,6 +320,7 @@ u_pipe_screen_get_param_defaults(struct pipe_screen *pscreen,
return 1 << 27;
case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
+ case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
default:
diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst
index e2b09d7b9c5..b5ad8f970d2 100644
--- a/src/gallium/docs/source/screen.rst
+++ b/src/gallium/docs/source/screen.rst
@@ -472,6 +472,9 @@ subpixel precision bias in bits during conservative rasterization.
* ``PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS``: Maximum total number of
atomic counter buffers. A value of 0 means the sum of all per-shader stage
maximums (see ``PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS``).
+* ``PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET: Maximum recommend memory size
+ for all active texture uploads combined. This is a performance hint.
+ 0 means no limit.
.. _pipe_capf:
diff --git a/src/gallium/drivers/etnaviv/etnaviv_screen.c b/src/gallium/drivers/etnaviv/etnaviv_screen.c
index cafc8bf1f5b..d838cd28c88 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_screen.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_screen.c
@@ -286,6 +286,7 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
case PIPE_CAP_PACKED_UNIFORMS:
case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
+ case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_MAX_GS_INVOCATIONS:
diff --git a/src/gallium/drivers/i915/i915_screen.c b/src/gallium/drivers/i915/i915_screen.c
index 5926d355508..169f502f05a 100644
--- a/src/gallium/drivers/i915/i915_screen.c
+++ b/src/gallium/drivers/i915/i915_screen.c
@@ -292,6 +292,7 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
+ case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c b/src/gallium/drivers/llvmpipe/lp_screen.c
index 15ddaf5333b..f706bf9c9c4 100644
--- a/src/gallium/drivers/llvmpipe/lp_screen.c
+++ b/src/gallium/drivers/llvmpipe/lp_screen.c
@@ -138,6 +138,7 @@ llvmpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_TEXTURE_SWIZZLE:
return 1;
case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
+ case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
return LP_MAX_TEXTURE_2D_LEVELS;
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_screen.c b/src/gallium/drivers/nouveau/nv30/nv30_screen.c
index 1e0b5728ddf..1d4e8c6aedb 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_screen.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_screen.c
@@ -241,6 +241,7 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
+ case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_MAX_GS_INVOCATIONS:
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
index 210ce18a8c8..0e3424ff82b 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
@@ -295,6 +295,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
+ case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_MAX_GS_INVOCATIONS:
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 6ad99ed6d65..461f7aed24a 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -322,6 +322,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_CONSTBUF0_FLAGS:
case PIPE_CAP_PACKED_UNIFORMS:
case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
+ case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_VENDOR_ID:
diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c
index 0c95acdad4b..a464cfb6501 100644
--- a/src/gallium/drivers/r300/r300_screen.c
+++ b/src/gallium/drivers/r300/r300_screen.c
@@ -263,6 +263,7 @@ static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
+ case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_MAX_GS_INVOCATIONS:
diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index e7ad2ee39a8..2680396c3d6 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -311,6 +311,10 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
return 1;
+ case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
+ /* Optimal number for good TexSubImage performance on Polaris10. */
+ return 64 * 1024 * 1024;
+
case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
return rscreen->b.info.drm_major == 2 && rscreen->b.info.drm_minor >= 43;
diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c
index 5d9061e49e9..a87cb3cbc8a 100644
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -190,6 +190,10 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
return 450;
return 420;
+ case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
+ /* Optimal number for good TexSubImage performance on Polaris10. */
+ return 64 * 1024 * 1024;
+
case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
return MIN2(sscreen->info.max_alloc_size, INT_MAX);
diff --git a/src/gallium/drivers/softpipe/sp_screen.c b/src/gallium/drivers/softpipe/sp_screen.c
index 61a4133d30d..bd8f655838a 100644
--- a/src/gallium/drivers/softpipe/sp_screen.c
+++ b/src/gallium/drivers/softpipe/sp_screen.c
@@ -92,6 +92,7 @@ softpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_TEXTURE_SWIZZLE:
return 1;
case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
+ case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
return SP_MAX_TEXTURE_2D_LEVELS;
diff --git a/src/gallium/drivers/svga/svga_screen.c b/src/gallium/drivers/svga/svga_screen.c
index ea22a4fe7d4..be653bd4fe2 100644
--- a/src/gallium/drivers/svga/svga_screen.c
+++ b/src/gallium/drivers/svga/svga_screen.c
@@ -392,6 +392,7 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
+ case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
return 64;
diff --git a/src/gallium/drivers/swr/swr_screen.cpp b/src/gallium/drivers/swr/swr_screen.cpp
index 2190be4b571..de9008ddf6a 100644
--- a/src/gallium/drivers/swr/swr_screen.cpp
+++ b/src/gallium/drivers/swr/swr_screen.cpp
@@ -363,6 +363,7 @@ swr_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
+ case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_MAX_GS_INVOCATIONS:
return 32;
diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c
index a72ea3a3a1a..e71883b06f1 100644
--- a/src/gallium/drivers/virgl/virgl_screen.c
+++ b/src/gallium/drivers/virgl/virgl_screen.c
@@ -324,6 +324,7 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
+ case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
case PIPE_CAP_MAX_GS_INVOCATIONS:
return 32;
diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h
index f6052196733..6f11527d5ca 100644
--- a/src/gallium/include/pipe/p_defines.h
+++ b/src/gallium/include/pipe/p_defines.h
@@ -823,6 +823,7 @@ enum pipe_cap
PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS,
PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS,
PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS,
+ PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET,
};
/**