diff options
author | Jordan Justen <[email protected]> | 2016-03-10 17:25:45 -0800 |
---|---|---|
committer | Jordan Justen <[email protected]> | 2016-03-12 13:13:37 -0800 |
commit | c8ec65a1f5a85dbef3210dc49684fcfed49b7ea2 (patch) | |
tree | bedf2c8b6651e58b519e1fbf0df0c787061dbd27 /src | |
parent | 1b126305ded36f6b416ada08e29ff84faeafef99 (diff) |
anv: Add flush_pipeline_before_pipeline_select
flush_pipeline_before_pipeline_select adds workarounds required before
switching the pipeline.
Signed-off-by: Jordan Justen <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/intel/vulkan/genX_cmd_buffer.c | 35 |
1 files changed, 22 insertions, 13 deletions
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index d0a80f53e63..1ce53a81f1b 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -764,10 +764,31 @@ void genX(CmdDispatchIndirect)( anv_batch_emit(batch, GENX(MEDIA_STATE_FLUSH)); } +static void +flush_pipeline_before_pipeline_select(struct anv_cmd_buffer *cmd_buffer, + uint32_t pipeline) +{ +#if GEN_GEN >= 8 && GEN_GEN < 10 + /* From the Broadwell PRM, Volume 2a: Instructions, PIPELINE_SELECT: + * + * Software must clear the COLOR_CALC_STATE Valid field in + * 3DSTATE_CC_STATE_POINTERS command prior to send a PIPELINE_SELECT + * with Pipeline Select set to GPGPU. + * + * The internal hardware docs recommend the same workaround for Gen9 + * hardware too. + */ + if (pipeline == GPGPU) + anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CC_STATE_POINTERS)); +#endif +} + void genX(flush_pipeline_select_3d)(struct anv_cmd_buffer *cmd_buffer) { if (cmd_buffer->state.current_pipeline != _3D) { + flush_pipeline_before_pipeline_select(cmd_buffer, _3D); + anv_batch_emit(&cmd_buffer->batch, GENX(PIPELINE_SELECT), #if GEN_GEN >= 9 .MaskBits = 3, @@ -781,19 +802,7 @@ void genX(flush_pipeline_select_gpgpu)(struct anv_cmd_buffer *cmd_buffer) { if (cmd_buffer->state.current_pipeline != GPGPU) { -#if GEN_GEN >= 8 && GEN_GEN < 10 - /* From the Broadwell PRM, Volume 2a: Instructions, PIPELINE_SELECT: - * - * Software must clear the COLOR_CALC_STATE Valid field in - * 3DSTATE_CC_STATE_POINTERS command prior to send a PIPELINE_SELECT - * with Pipeline Select set to GPGPU. - * - * The internal hardware docs recommend the same workaround for Gen9 - * hardware too. - */ - anv_batch_emit(&cmd_buffer->batch, - GENX(3DSTATE_CC_STATE_POINTERS)); -#endif + flush_pipeline_before_pipeline_select(cmd_buffer, GPGPU); anv_batch_emit(&cmd_buffer->batch, GENX(PIPELINE_SELECT), #if GEN_GEN >= 9 |