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authorJason Ekstrand <[email protected]>2015-11-23 10:53:01 -0800
committerJason Ekstrand <[email protected]>2015-11-23 10:55:38 -0800
commit9d703de85a7bdd6ae767aedd7690cb82794cb90a (patch)
tree1639e38bb175091eff38d06a8a112a7bec97afad /src
parente4c1221d367405debdb010b249c633355a3eafe9 (diff)
i965: Use ull immediates in brw_inst_bits
This fixes a regression introduced in b1a83b5d1 that caused basically all shaders to fail to compile on 32-bit platforms. Reported-by: Mark Janes <[email protected]> Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_inst.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_inst.h b/src/mesa/drivers/dri/i965/brw_inst.h
index b2afe17f950..cd9f6ef591d 100644
--- a/src/mesa/drivers/dri/i965/brw_inst.h
+++ b/src/mesa/drivers/dri/i965/brw_inst.h
@@ -694,7 +694,7 @@ brw_inst_bits(const brw_inst *inst, unsigned high, unsigned low)
high %= 64;
low %= 64;
- const uint64_t mask = (~0ul >> (64 - (high - low + 1)));
+ const uint64_t mask = (~0ull >> (64 - (high - low + 1)));
return (inst->data[word] >> low) & mask;
}
@@ -713,7 +713,7 @@ brw_inst_set_bits(brw_inst *inst, unsigned high, unsigned low, uint64_t value)
high %= 64;
low %= 64;
- const uint64_t mask = (~0ul >> (64 - (high - low + 1))) << low;
+ const uint64_t mask = (~0ull >> (64 - (high - low + 1))) << low;
/* Make sure the supplied value actually fits in the given bitfield. */
assert((value & (mask >> low)) == value);