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authorDave Airlie <[email protected]>2014-11-18 09:54:39 +1000
committerDave Airlie <[email protected]>2014-11-18 11:58:16 +1000
commit4a128d5a16a575faaac969468a3aaafce48504cf (patch)
tree1189af718120abc8cc98924f42d77c6dba605d38 /src
parent11abd7b2bc49455bb8c5b2f9e60f92d4284ae6c2 (diff)
r600g/cayman: fix integer multiplication output overwrite (v2)
This fixes tests/spec/glsl-1.10/execution/fs-op-assign-mult-ivec2-ivec2-overwrite.shader_test. hopeful fix for fd.o bug 85376 Reported-by: ghallberg Cc: "10.3 10.4" <[email protected]> Reviewed-by: Glenn Kennard <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/r600/r600_shader.c26
1 files changed, 23 insertions, 3 deletions
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index aab4215d7ae..ac26d77ec91 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -2728,8 +2728,10 @@ static int cayman_mul_int_instr(struct r600_shader_ctx *ctx)
struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
int i, j, k, r;
struct r600_bytecode_alu alu;
- int last_slot = (inst->Dst[0].Register.WriteMask & 0x8) ? 4 : 3;
- for (k = 0; k < last_slot; k++) {
+ int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask);
+ int t1 = ctx->temp_reg;
+
+ for (k = 0; k <= lasti; k++) {
if (!(inst->Dst[0].Register.WriteMask & (1 << k)))
continue;
@@ -2739,7 +2741,8 @@ static int cayman_mul_int_instr(struct r600_shader_ctx *ctx)
for (j = 0; j < inst->Instruction.NumSrcRegs; j++) {
r600_bytecode_src(&alu.src[j], &ctx->src[j], k);
}
- tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ alu.dst.sel = t1;
+ alu.dst.chan = i;
alu.dst.write = (i == k);
if (i == 3)
alu.last = 1;
@@ -2748,6 +2751,23 @@ static int cayman_mul_int_instr(struct r600_shader_ctx *ctx)
return r;
}
}
+
+ for (i = 0 ; i <= lasti; i++) {
+ if (!(inst->Dst[0].Register.WriteMask & (1 << i)))
+ continue;
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.op = ALU_OP1_MOV;
+ alu.src[0].sel = t1;
+ alu.src[0].chan = i;
+ tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
+ alu.dst.write = 1;
+ if (i == lasti)
+ alu.last = 1;
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ }
+
return 0;
}