diff options
author | Samuel Pitoiset <[email protected]> | 2018-07-25 14:55:31 +0200 |
---|---|---|
committer | Samuel Pitoiset <[email protected]> | 2018-07-26 08:57:43 +0200 |
commit | ff0d553818c9f6a28f7de109d13afe9b25a802dc (patch) | |
tree | 6f06835764a8ca1577674afb178ae470ee99c5f1 /src | |
parent | 6465bf0015662a164b71fd950a883e9723eb2b94 (diff) |
radv: fix adjusting vertex fetches since 16bit support
Move the integer conversion after the fixup.
This fixes some regressions with
dEQP-VK.pipeline.vertex_input.single_attribute.mat4.as_a2r10g10b10*
Fixes: b722b29f10 ("radv: add support for 16bit input/output")
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/amd/vulkan/radv_nir_to_llvm.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 9f9dc0d4fee..64b6522cd93 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -2030,15 +2030,16 @@ handle_vs_input_decl(struct radv_shader_context *ctx, output[chan] = LLVMBuildBitCast(ctx->ac.builder, output[chan], ctx->ac.f32, ""); output[chan] = LLVMBuildFPTrunc(ctx->ac.builder, output[chan], ctx->ac.f16, ""); } - output[chan] = ac_to_integer(&ctx->ac, output[chan]); - if (type == GLSL_TYPE_UINT16 || type == GLSL_TYPE_INT16) - output[chan] = LLVMBuildTrunc(ctx->ac.builder, output[chan], ctx->ac.i16, ""); } unsigned alpha_adjust = (ctx->options->key.vs.alpha_adjust >> (attrib_index * 2)) & 3; output[3] = adjust_vertex_fetch_alpha(ctx, alpha_adjust, output[3]); for (unsigned chan = 0; chan < 4; chan++) { + output[chan] = ac_to_integer(&ctx->ac, output[chan]); + if (type == GLSL_TYPE_UINT16 || type == GLSL_TYPE_INT16) + output[chan] = LLVMBuildTrunc(ctx->ac.builder, output[chan], ctx->ac.i16, ""); + ctx->inputs[ac_llvm_reg_index_soa(variable->data.location + i, chan)] = output[chan]; } } |